Patents by Inventor John Kitamura

John Kitamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210271631
    Abstract: A computing device includes an array of processing elements mutually connected to perform single instruction multiple data (SIMD) operations, memory cells connected to each processing element to store data related to the SIMD operations, and a cache connected to each processing element to cache data related to the SIMD operations. Caches of adjacent processing elements are connected. The same or another computing device includes rows of mutually connected processing elements to share data. The computing device further includes a row arithmetic logic unit (ALU) at each row of processing elements. The row ALU of a respective row is configured to perform an operation with processing elements of the respective row.
    Type: Application
    Filed: February 26, 2021
    Publication date: September 2, 2021
    Inventors: William Martin SNELGROVE, John KITAMURA
  • Publication number: 20210091794
    Abstract: A processing element includes an input zero detector to detect whether the input from the neighbor processing element contains a zero. When the input from the neighbor processing element contains the zero, a zero disable circuit controls the input from the neighbor processing element and respective data of the memory to both appear as unchanged to the arithmetic logic unit for the operation. A controller of an array of processing elements adds a row of error-checking values to a matrix of coefficients, each error-checking value of the row of error-checking values being a negative sum of a respective column of the matrix of coefficients. The controller controls a processing element to perform an operation with the matrix of coefficients and an input vector to accumulate a result vector. Owing to the error-checking values, when a sum of elements of the result vector is non-zero, an error is detected.
    Type: Application
    Filed: September 23, 2020
    Publication date: March 25, 2021
    Inventors: William Martin SNELGROVE, John KITAMURA
  • Patent number: 5923316
    Abstract: A method of converting video data from a YUV format to an RGB format comprising (a) performing a matrix transformation of Y, U and V pixel data of a set of possible Y, U and V parameters into corresponding R, G and B parameters, (b) determining whether the set of R, G and B parameters forms a first lookup table whose size exceeds the size of a particular memory space, (c) in the event the lookup table is too large for the memory space, truncating least significant bits of at least the U and V parameters, (d) repeating steps (a), (b) and (c) until the first lookup table fits the memory space, and then storing the first lookup table in the memory space, and (e) using the first lookup table to provide RGB pixel data using the YUV data as addresses thereto.
    Type: Grant
    Filed: October 15, 1996
    Date of Patent: July 13, 1999
    Assignee: ATI Technologies Incorporated
    Inventors: John Kitamura, Andreas Thut, Indra Laksono
  • Patent number: 5835375
    Abstract: A method of reconstructing a stream of digital frequency domain audio signal samples into audio signals comprising parsing the stream of samples and reconstructing subband data in the frequency domain, processing the subband data to obtain a processed frequency domain digital audio signal, and constructing a time domain audio output signal from the processed frequency domain digital audio signal.
    Type: Grant
    Filed: January 2, 1996
    Date of Patent: November 10, 1998
    Assignee: ATI Technologies Inc.
    Inventor: John Kitamura
  • Patent number: 5742272
    Abstract: A method of drawing moving images on a graphics display comprising (a) receiving data defining an input image in a predetermined resolution, (b) commanding a graphics processor to draw a corresponding image frame on a display having a number of scanning lines which is a multiple m of a number of scanning lines of the input image and a multiple n of a number of pixels in a horizontal line of the input image, (c) drawing successive lines of the input image on a first and on each m.sup.th scanning line of the graphics display, while stretching each pixel on each drawn line over n pixels, (d) copying each drawn line on respective immediately following m-1 lines, and (e) repeating steps (b)-(d) for successive frames of the input image.
    Type: Grant
    Filed: April 29, 1996
    Date of Patent: April 21, 1998
    Assignee: ATI Technologies Inc.
    Inventors: John Kitamura, Indra Laksono, Adrian H. Hartog