Abstract: Endophyte inoculant compositions, methods of making such compositions, methods of using such compositions, and physiologically altered plants treating with such compositions are disclosed. The endophyte inoculant composition may include one or more of endophyte strains WW5, WW6, WW7, and PTD1, which promote plant mineral nutrient acquisition and uptake, vigor, health, growth, and yield when applied to non-native host plants.

Abstract: Endophyte inoculant compositions, methods of making such compositions, methods of using such compositions, and physiologically altered plants treating with such compositions are disclosed. The endophyte inoculant composition may include one or more of endophyte strains WW5, WW6, WW7, and PTD1, which promote plant mineral nutrient acquisition and uptake, vigor, health, growth, and yield when applied to non-native host plants.

Abstract: Endophyte inoculant compositions, methods of making such compositions, methods of using such compositions, and physiologically altered plants treating with such compositions are disclosed. The endophyte inoculant composition may include one or more of endophyte strains WW5, WW6, WW7, and PTD1, which promote plant mineral nutrient acquisition and uptake, vigor, health, growth, and yield when applied to non-native host plants.

Abstract: A method for damage avoidance in transferring a monocrystalline, thin layer from a first substrate onto a second substrate involves epitaxial growth of a sandwich structure with a strained epitaxial layer buried below a monocrystalline thin layer, and lift-off and transfer of the monocrystalline thin layer with the cleaving controlled to happen within the buried strained layer in conjunction with the introduction of hydrogen.

Abstract: In a semiconductor manufacturing method, an emitter region (211) and a base enhancement region (207) are formed to provide linear voltage, capacitance and low resistance characteristics. In the manufacturing method, a semiconductor device (200) is formed on a silicon substrate layer (101) with an epitaxial layer (203). Trenches (233) are cut into the epitaxial layer (203) and filled with oxide (601) to provide reduced junction capacitance and reduced base resistance. The emitter region (211) and the base enhancement region (207) are simultaneously formed through an anneal process.

Abstract: In a semiconductor manufacturing method, an emitter region (211) and a base enhancement region (207) are formed to provide linear voltage, capacitance and low resistance characteristics. In the manufacturing method, a semiconductor device (200) is formed on a silicon substrate layer (101) with an epitaxial layer (203). Trenches (233) are cut into the epitaxial layer (203) and filled with oxide (601) to provide reduced junction capacitance and reduced base resistance. The emitter region (211) and the base enhancement region (207) are simultaneously formed through an anneal process.

Abstract: A method of manufacturing a semiconductor component includes providing a composite substrate (300) with a dielectric portion and a semiconductor portion and growing an epitaxial layer (400) over the composite substrate. The epitaxial layer has a polycrystalline portion (402) over the dielectric portion of the composite substrate and also has a monocrystalline portion (401) over the semiconductor portion of the composite substrate. A first dopant is diffused into the monocrystalline portion of the epitaxial layer to form an emitter region in the monocrystalline portion of the epitaxial layer while a second dopant is simultaneously diffused into the monocrystalline portion of the epitaxial layer to form an enhanced portion of the base region.

Abstract: A semiconductor device (10) is formed in a semiconductor substrate (11) that acts as a collector region. A base region (12) is formed in the semiconductor substrate (11) and an emitter region (52) is formed such that it contacts at least a portion of the base region (12). A conductive layer (28) is used to provide electrical connection to the emitter region (52). The portion of the conductive layer (28) above the emitter region (52) is counter-doped to address the problems of an interfacial oxide layer (27) that exists between the emitter region (52) and the conductive layer (28).

Abstract: A metallization alloy for semiconductor devices comprising aluminum, copper, and tungsten is provided. In a method for applying the metallization, the metal is sputtered onto a semiconductor substrate having devices formed therein. After deposition, the metallization is patterned and etched using conventional semiconductor photoresist and etch techniques.

Abstract: A metallization alloy for semiconductor devices comprising aluminum, copper, and tungsten is provided. In a method for applying the metallization, the metal is sputtered onto a semiconductor substrate having devices formed therein. After deposition, the metallization is patterned and etched using conventional semiconductor photoresist and etch techniques.

Abstract: A planarized multi-layer metal bonding pad. A first metal bonding pad layer (13) that defines a metal bonding pad is provided. A first dielectric layer (14) is provided with a multitude of vias (17) that covers the first metal bonding pad layer (13), thereby exposing portions of the first metal bonding pad layer (13) through the multitude of vias (17) in the first dielectric (14). A second metal bonding pad layer (18) that further defines the metal bonding pad is deposited on the first dielectric layer (14) making electrical contact to the first metal bonding pad layer through the multitude of vias (17). Planarization of the second metal bonding pad layer (18) is achieved by having the second metal bonding pad layer (18) cover the first dielectric layer (14) and making contact through the vias (17).

Abstract: A method is provided for planarizing a multi-layer metal bonding pad. A first metal layer (13) is provided. A first dielectric layer (14) is provided with a multitude of vias (17) covering the first metal layer (13), thereby exposing portions of the first metal layer (13) through the multitude of vias (17) in the first dielectric (14). A second metal layer (18) is deposited on the first dielectric layer (14) making electrical contact to the first metal layer through the multitude of vias (17). Planarization of the second metal layer (18) is achieved by having the second metal layer (18) cover the first dielectric layer (14) and making contact through the vias (17).

Abstract: A data processing system having a local memory bus, a main memory coupled to the local memory bus and a host central processing unit coupled to the local memory bus includes a single input/output controller for interfacing a plurality of input/output devices to the local memory bus. The input/output controller includes a plurality of input/output device controllers, each input/output device controller being adapted to be connected to at least one input/output device, a single microprocessor for managing the overall operations of the input/output controller, a single buffer memory for storing a program of instructions for the microprocessor and temporarily storing data received from the input/output devices and a gate array for interfacing all of the input/output device controllers to the local memory bus.

Abstract: Metal step coverage is improved by utilizing a multiple step metallization process. In the first step, a thick portion of a metal layer is deposited on a semiconductor wafer at a cold temperature. The remaining amount of metal is deposited in a second step as the temperature is ramped up to allow for reflow of the metal layer through grain growth, recrystallization and bulk diffusion. The thick portion of the metal layer deposited at the cold temperature is of adequate thickness so that it remains continuous at the higher temperature and enhances via filling.

Abstract: A residue-free plasma etch of high temperature aluminum copper metallization is provided by the use of a single plasma etcher. The metallization layer is covered by a protective oxide layer. This structure is then placed in the single etcher and a vacuum is established. The protective oxide layer is then etched and without breaking the vacuum or removing the structure from the etcher the metal layer is also etched. This results in the etched surface being residue-free.

Abstract: Two sail structures are disclosed for use in propelling a movable body, such as a ski, skate, iceboat or the like, over a solid surface. One sail structure uses the lateen configuration and includes a triangular shaped sail with an upper spar and lower boom for holding the sail in an open, triangular form; as well as a mast, connectable to the spar and boom, for supporting the sail in a lateen configuration. The other sail structure includes a vertical mast and a horizontal boom connected in a "cross. " A first right-triangular sail is connected at its three corners to the forward end of the boom, the top of the mast and the coupling point of the mast and boom. A second right-triangular sail has its edges connected along the mast and boom, between the coupling point and the top of the mast and between the coupling point and the rearwad end of the boom.

Abstract: Copolymers containing 40 to 90 mole % of repeat units ##STR1## and correspondingly 10 to 60 mole % of repeat units ##STR2## where Q and Q' are --SO.sub.2 -- or --CO-- and the number of --SO.sub.2 -- groups is 3 to 25% of the total number of --SO.sub.2 -- and --CO-- groups.

Abstract: Aromatic polyethers are made by reacting i) an equimolar mixture of a bisphenol of formula ##STR1## in which Y is a direct link, --O--, --S--, --SO.sub.2 --, --CO-- or a divalent hydrocarbon radical, and an aromatic dihalo compound or ii) a halophenol, in which dihalo compound or halophenol the halogen atoms are activated by ortho or para --SO.sub.2 -- or --CO-- groups, with an alkali metal carbonate or bicarbonate. At least some of the halophenol and/or dihalo compound is fluorine containing. The amount of carbonate or bicarbonate is such that there is between 1 and 1-x/2 atoms of alkali metal per phenol group, where x is the fraction of activated halogen atoms that are fluorine.

Abstract: Aromatic polyetherketones and polyether sulphones are prepared from a hydrated alkali metal bisphenate by heating a substantially equimolar mixture of the bisphenate and an activated aromatic dihalide in the presence of an aromatic sulphone to distil off the water, preferably at atmospheric pressure, and then heating at temperatures in the range 250.degree. to 400.degree. C. to effect polymerization.