Abstract: A method (300) of identifying failing bits in a ferroelectric memory device including at least one ferroelectric capacitor includes (302) writing same state data to the first capacitor, and (304) baking the first capacitor for a first specified period of time at a first selected temperature. A same state read (306) is performed on the first capacitor after the baking. Based on the results from the same state read, it is determined whether an error occurred. The first specified period of time can be from 10 minutes to 2 hours and the first selected temperature can be in a range from 85° C. to 150° C. A repair can be performed (310) to corrected detected errors. A related method (500) can detect imprinted bits using a same state write (502), followed by a relatively high temperature bake (504), then a same state read (506). An opposite state date write (508) is performed followed by a relatively low temperature bake (510), and then an opposite state data read (512) to identify opposite state error or imprint.

Abstract: A method (300) of identifying failing bits in a ferroelectric memory device including at least one ferroelectric capacitor includes (302) writing same state data to the first capacitor, and (304) baking the first capacitor for a first specified period of time at a first selected temperature. A same state read (306) is performed on the first capacitor after the baking. Based on the results from the same state read, it is determined whether an error occurred. The first specified period of time can be from 10 minutes to 2 hours and the first selected temperature can be in a range from 85° C. to 150° C. A repair can be performed (310) to corrected detected errors. A related method (500) can detect imprinted bits using a same state write (502), followed by a relatively high temperature bake (504), then a same state read (506). An opposite state date write (508) is performed followed by a relatively low temperature bake (510), and then an opposite state data read (512) to identify opposite state error or imprint.

Abstract: A method (300) of identifying failing bits in a ferroelectric memory device including at least one ferroelectric capacitor includes (302) writing same state data to the first capacitor, and (304) baking the first capacitor for a first specified period of time at a first selected temperature. A same state read (306) is performed on the first capacitor after the baking. Based on the results from the same state read, it is determined whether an error occurred. The first specified period of time can be from 10 minutes to 2 hours and the first selected temperature can be in a range from 85° C. to 150° C. A repair can be performed (310) to corrected detected errors. A related method (500) can detect imprinted bits using a same state write (502), followed by a relatively high temperature bake (504), then a same state read (506). An opposite state date write (508) is performed followed by a relatively low temperature bake (510), and then an opposite state data read (512) to identify opposite state error or imprint.

Abstract: A method (300) of identifying failing bits in a ferroelectric memory device including at least one ferroelectric capacitor includes (302) writing same state data to the first capacitor, and (304) baking the first capacitor for a first specified period of time at a first selected temperature. A same state read (306) is performed on the first capacitor after the baking. Based on the results from the same state read, it is determined whether an error occurred. The first specified period of time can be from 10 minutes to 2 hours and the first selected temperature can be in a range from 85° C. to 150° C. A repair can be performed (310) to corrected detected errors. A related method (500) can detect imprinted bits using a same state write (502), followed by a relatively high temperature bake (504), then a same state read (506). An opposite state date write (508) is performed followed by a relatively low temperature bake (510), and then an opposite state data read (512) to identify opposite state error or imprint.