Abstract: A MEMS transducer package (1) comprises a semiconductor die element (3) and a cap element (23). The semiconductor die element (3) and cap element (23) have mating surfaces (9, 21). The semiconductor die element (3) and cap element (23) are configured such that when the semiconductor die element (3) and cap element (4) are conjoined, a first volume (7, 27) is formed through the semiconductor die element (3) and into the semiconductor cap element (23), and an acoustic channel is formed to provide an opening between a non-mating surface (11) of the semiconductor die element (3) and a side surface (10, 12) of the transducer package.

Abstract: This application relates to methods and apparatus for transfer of multiple digital data streams, especially of digital audio data over a single communications link such as a single wire. The application describes audio interface circuitry comprising a pulse-length-modulation (PLM) modulator (204). The PLM is responsive to a plurality of data streams (PDM-R, PDM-L), to generate a series of data pulses (PLM) with a single data pulse having a rising and falling edge in each of a plurality of transfer periods defined by a first clock signal (TCLK). The timing of the rising and falling edge of each data pulse is dependent upon on a combination of the then current data samples from the plurality of data streams. The duration and position of the data pulse in the transfer window in effect defines a data symbol encoding the data. Circuitry for receiving and extracting the data is also disclosed.

Abstract: Circuitry for transferring multiple digital data streams, e.g. digital audio data, over a single communications link such as a single wire. A pulse-length-modulator is responsive to a plurality of data streams to generate a series of data pulses with a single data pulse having a rising and falling edge in each of a plurality of transfer periods defined by a first clock signal. The timing of the rising and falling edge of each data pulse is dependent on a combination of the then current data samples from the plurality of data streams. The duration and position of the data pulse in the transfer window in effect defines a data symbol encoding the data. An interface receives the stream of data pulses, and data extraction circuitry samples the data pulse to determine which of the possible data symbols the pulse represents and determines a data value for at least one received data stream.

Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes.

Abstract: The present invention relates to methods and apparatus for data transfer. A data interface is described with at least a first data terminal for either outputting or receiving a data signal. In bi-directional embodiments there may be one terminal for receiving data and one terminal for outputting data. A bit clock terminal outputs or receives a bit clock signal; and a frame clock terminal for outputs or receives a frame clock signal. Interface control circuitry is configurable to associate data outputted or received in each frame with time slots (1-8) of a predetermined number of bits (x, y, z) wherein the control circuitry is adapted such that the frequency of the bit clock signal can be changed at any time so as to vary the number of time slots in a frame.

Abstract: A bipolar output charge pump circuit having a network of switching paths 110 for selectively connecting an input node (VV) and a reference node (VG) for connection to an input voltage, a first pair of output nodes (VP, VN), two pairs of flying capacitor nodes (CF1A, CF1B; CF2A, CF2B), and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors (CF1, CF2) connected to the two pairs of flying capacitor nodes, to provide a first mode and a second mode when in use with two flying capacitors connected to the flying capacitor nodes, wherein at least the first mode corresponds to a bipolar output voltage of +/?3VV, +/?VV/5 or +/?VV/6.

Abstract: Circuitry for biasing a MEMS transducer and associated signal processing circuitry. A reference voltage generator is configured to generate a reference voltage at a reference voltage node. Control circuitry generates a drive signal to control a first current source which is operable to supply a current to the reference voltage generator in response to the drive signal. A switched DC-DC converter, such as a charge pump has a voltage input connected to the reference voltage node and a voltage output for providing a bias voltage for the MEMS transducer. The DC-DC converter cyclically switches in a sequence of states including at least a first state where a first converter capacitance is disconnected from the voltage input followed by a second state where the first converter capacitance is connected to the voltage input. A second current source Is operable to supply a bias current in response to a voltage at a bias control node.

Abstract: A bipolar output charge pump circuit having a network of switching paths for selectively connecting an input node and a reference node for connection to an input voltage, a first pair of output nodes and a second pair of output nodes, and two pairs of flying capacitor nodes, and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes and a second bipolar output voltage at the second pair of bipolar output nodes.

Abstract: A bipolar output charge pump circuit 100 having a network of switching paths 110 for selectively connecting an input node (VV) and a reference node (VG) for connection to an input voltage, a first pair of output nodes (VP, VN) and a second pair of output nodes (VQ, VM), and two pairs of flying capacitor nodes (CF1A, CF1 B; CF2A, CF2B), and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors (CF1, CF2) connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes (VP, VN) and a second bipolar output voltage at the second pair of bipolar output nodes (VQ, VM).

Abstract: Charge pump circuits having circuit components such as transistors which may be damaged by voltage transients greater than the normal operating voltage levels of the charge pump circuit, such as may be experienced during powering down. The circuit components to be protected are connected in parallel with a leakage element arranged to have a leakage current that is small enough during normal operation to allow the charge pump to operate effectively but which is large enough, during development of a voltage transient, to prevent excess voltage levels being achieved. The leakage element may have a significant leakage current at a voltage less than the breakdown voltage of the circuit component. Suitable leakage elements are poly diodes.

Abstract: An apparatus and method for regulating analogue-to-digital converters. First and second input signals are received at controlled oscillator circuitry which generates respective first and second pulse streams with pulse rates based on the relevant input signal. Difference circuitry determines the difference in number of pulses of the first and second pulse streams and outputs a first digital signal. Circuitry also determines a signal independent value based on the number of pulses of the first and/or second pulse streams. In one embodiment this value is the sum or average of the number of pulses of the first and second pulse streams. This value can be used to calibrate for any variation in transfer characteristic of the oscillator circuitry. In one embodiment this value is compared to a reference value and a regulation signal passed to control circuitry to regulate the operation of the oscillation circuitry.

Abstract: A method of testing a capacitive transducer circuit, for example a MEMS capacitive transducer, by applying a test signal via one or more capacitors provided in the transducer circuit.

Abstract: An apparatus and method for regulating analogue-to-digital converters. First and second input signals are received at controlled oscillator circuitry which generates respective first and second pulse streams with pulse rates based on the relevant input signal. Difference circuitry determines the difference in number of pulses of the first and second pulse streams and outputs a first digital signal. Circuitry also determines a signal independent value based on the number of pulses of the first and/or second pulse streams. In one embodiment this value is the sum or average of the number of pulses of the first and second pulse streams. This value can be used to calibrate for any variation in transfer characteristic of the oscillator circuitry. In one embodiment this value is compared to a reference value and a regulation signal passed to control circuitry to regulate the operation of the oscillation circuitry.

Abstract: Semiconductor structures with high impedances for use in biasing for applying voltage bias to part of a device. The semiconductor structure comprises a continuous structure having a plurality of regions of a first semiconductor type (n type or p type) material arranged alternately with at least one region of the opposite type. The structure may be formed from polysilicon and may also include a plurality of intrinsic regions arranged between the n and p type regions. The structure forms a composite diode and provides a high impedance.

Abstract: A signal amplifying circuit and associated methods and apparatuses, the circuit comprising: a signal path extending from an input terminal to an output terminal, a gain controller arranged to control the gain applied along the signal path in response to a control signal; an output stage within the signal path for generating the output signal, the output stage having a gain that is substantially independent of its supply voltage, and a variable voltage power supply comprising a charge pump for providing positive and negative output voltages, the charge pump comprising a network of switches that is operable in a number of different states and a controller for operating the switches in a sequence of the states so as to generate positive and negative output voltages together spanning a voltage approximately equal to the input voltage.

Abstract: The present invention relates to methods and apparatus for data transfer. A data interface is described with at least a first data terminal for either outputting or receiving a data signal. In bi-directional embodiments there may be one terminal for receiving data and one terminal for outputting data. A bit clock terminal outputs or receives a bit clock signal; and a frame clock terminal for outputs or receives a frame clock signal. Interface control circuitry is configurable to associate data outputted or received in each frame with time slots (1-8) of a predetermined number of bits (x, y, z) wherein the control circuitry is adapted such that the frequency of the bit clock signal can be changed at any time so as to vary the number of time slots in a frame.

Abstract: A bipolar output charge pump circuit having a network of switching paths 110 for selectively connecting an input node (VV) and a reference node (VG) for connection to an input voltage, a first pair of output nodes (VP, VN), two pairs of flying capacitor nodes (CF1A, CF1B; CF2A, CF2B), and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors (CF1, CF2) connected to the two pairs of flying capacitor nodes, to provide a first mode and a second mode when in use with two flying capacitors connected to the flying capacitor nodes, wherein at least the first mode corresponds to a bipolar output voltage of +/?3VV, +/?VV/5 or +/?VV/6.

Abstract: A bipolar output charge pump circuit 100 having a network of switching paths 110 for selectively connecting an input node (VV) and a reference node (VG) for connection to an input voltage, a first pair of output nodes (VP, VN) and a second pair of output nodes (VQ, VM), and two pairs of flying capacitor nodes (CF1A, CF1 B; CF2A, CF2B), and a controller for controlling the switching of the network of switching paths. The controller is operable to control the network of switching paths when in use with two flying capacitors (CF1, CF2) connected to the two pairs of flying capacitor nodes, to provide a first bipolar output voltage at the first pair of output nodes (VP, VN) and a second bipolar output voltage at the second pair of bipolar output nodes (VQ, VM).

Abstract: A method of testing a capacitive transducer circuit, for example a MEMS capacitive transducer, by applying a test signal via one or more capacitors provided in the transducer circuit.

Abstract: A charging circuit for charging/biasing high impedance loads such as capacitive loads. The circuit comprises an input for connecting to a voltage/charge source and an output for connecting to the load. A capacitor is connected between the output and a reference voltage such as ground and a reverse bias diode is connected between the input and the output terminals. The reverse bias diode is arranged to allow a reverse current to pass which is sufficient to compensate for current leakage at the output terminal or other parts of the circuit. The reverse bias diode is conveniently a polysilicon diode. The diode may be connected in parallel with a shunt device to allow for rapid charging during start up.