Patents by Inventor John Logue

John Logue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200253773
    Abstract: Systems and methods for supporting a user's limb are provided. In some embodiments, a system may include a foot plate configured to engage the user's foot, a coupling configured to engage a portion of the user's leg, a first leaf spring disposed between the foot plate and the coupling, and a second leaf spring extending alongside at least a portion of the first leaf spring. In some embodiments, a space may be defined between the first leaf spring and the second leaf spring. In some embodiments, the space between the first leaf spring and the second leaf spring may be configured to receive one or more spacers of a plurality of spacers.
    Type: Application
    Filed: February 7, 2020
    Publication date: August 13, 2020
    Applicant: Gait Dynamics LLC
    Inventor: John LOGUE
  • Publication number: 20060178606
    Abstract: The invention provides in part devices and methods of manufacturing and using the same for treating patients suffering from tendon dysfunction. Certain exemplary brace embodiments contain strapping systems and inflatable cells that are adapted to support the forefoot of the patient.
    Type: Application
    Filed: October 19, 2005
    Publication date: August 10, 2006
    Applicant: AIRCAST, LLC
    Inventors: John Logue, Lew Schon, Christopher Chiodo, Brent Parks, David Hargrave, Nick Grippi
  • Publication number: 20050248364
    Abstract: Method and apparatus for dynamic configuration of function block logic of an integrated circuit is described. The integrated circuit includes a reconfiguration port coupled to a controller. The controller is coupled to an array of memory cell. A portion of the array of memory cells is coupled for read/write communication with the controller, and another portion of the array of memory cells is not coupled for read/write communication with the controller. The portion of the array of memory cells is configurable at an operational frequency of the integrated circuit for dynamic reconfiguration of the function block logic of the integrated circuit.
    Type: Application
    Filed: April 30, 2004
    Publication date: November 10, 2005
    Applicant: Xilinx, Inc.
    Inventors: Vasisht Vadi, David Schultz, John Logue, John McGrath, Anthony Collins, F. Goetting
  • Publication number: 20050242835
    Abstract: Method and apparatus for a controller for dynamic configuration is described. The controller comprises a port interface, a read/write interface, and a plurality of flip-flops. The flip-flops, couple the port interface to the read/write interface. The port interface is configured to receive a plurality of signals, where portion of the plurality of signals are pipelined through the plurality of flip-flops responsive to a data clock signal of the plurality of signals. This facilitates reading and writing to storage elements at a rate which is at least approximately a frequency of the data clock signal while operating a device at approximately such frequency in which the controller is instantiated.
    Type: Application
    Filed: April 30, 2004
    Publication date: November 3, 2005
    Applicant: Xilinx, Inc.
    Inventors: Vasisht Vadi, David Schultz, John Logue, John McGrath, Anthony Collins, F. Goetting
  • Publication number: 20050246520
    Abstract: Method and apparatus for an interface to a system monitor (1600) is described. A controller (102) accessible via a port interface thereof (110) is configured for read/write access to configuration memory cells (1500) and for read access to status registers (1602). The configuration memory cells (1500) are addressable via a first address space, and the status registers (1602) are addressable via a second address space different from the first address space. The port interface (110) is configured to receive a plurality of signals including a data address signal (124) and a data clock signal (121). The data address signal (124) has address information for accessing either the first address space or the second address space.
    Type: Application
    Filed: April 30, 2004
    Publication date: November 3, 2005
    Applicant: Xilinx, Inc.
    Inventors: Vasisht Vadi, David Schultz, John Logue, John McGrath, Anthony Collins, F. Goetting
  • Publication number: 20050242834
    Abstract: Method and apparatus for sub-frame bit access for reconfiguring a logic block of a programmable logic device is described. A reconfiguration port in communication with a controller is provided. The controller is in communication with configuration memory for configuring the logic block. Configuration information is provided via the reconfiguration port. A single data word stored in the configuration memory is read via the controller, modified with the configuration information, and written back into configuration memory. Accordingly, by reading a single data word, in contrast to an entire frame, on-the-fly reconfiguration is facilitated.
    Type: Application
    Filed: April 30, 2004
    Publication date: November 3, 2005
    Applicant: Xilinx, Inc.
    Inventors: Vasisht Vadi, David Schultz, John Logue, John McGrath, F. Goetting, Anthony Collins
  • Patent number: 6946833
    Abstract: An improved polar coordinates sensor comprising a pot-core half having a concentric winding window surrounded by a washer-like high conductive Lenz lens. A toroidal core stack concentrically disposed at the base end of the pot-core half, the pot-core half, Lenz lens and the toroidal core stack being disposed coaxially with aligned winding windows. X-y coordinates excitation winding distributions being shuttled through the coaxial aligned windows to encircle the cross-section of pot-core half, Lenz lens and toroidal core stack forming a series circuit. X-y excitation currents being connected to the excitation distributions to induce a hemispherical driving field. The inductive reactance of the series coupled toroidal core stack allows an increased degree of differential redistribution of driving flux in response to probe tilt. A rotating/non-rotating excitation method, of which a source of the x-y signals may include electromechanical resolver type waveforms.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: September 20, 2005
    Inventors: Delmar Leon Logue, Stephen John Logue
  • Patent number: 6580267
    Abstract: An axial direction groove is formed in a high permeability toroidal core taking the form of a pot core half with a mounting hole, a high cross-section ratio copper casing being tightly fit around core circumference, having poly-phase excitation windings shuttled through the mounting hole to encompass both the copper casing and the pot-core, forming an integral driving-sensing eddy current probe. A naked pot-core is wound as an integral driving-sensing probe. Poly-phase excitation of the probe is mesh-connected as a gramme-ring.
    Type: Grant
    Filed: June 4, 2001
    Date of Patent: June 17, 2003
    Assignee: Logue Sensor Co.
    Inventors: Delmar Leon Logue, Stephen John Logue
  • Publication number: 20020008512
    Abstract: An axial direction groove is formed in a high permeability toroidal core taking the form of a pot core half with a mounting hole, a high cross-section ratio copper casing being tightly fit around core circumference, having poly-phase excitation windings shuttled thriugh the mounting hole to encompass both the copper casing and the pot-core, forming an integral driving-sensing eddy current probe. A naked pot-core is wound as an integral driving-sensing probe. Poly-phase excitation of the probe is mesh-connected as a gramme-ring.
    Type: Application
    Filed: June 4, 2001
    Publication date: January 24, 2002
    Inventors: Delmar Leon Logue, Stephen John Logue