Patents by Inventor John Lopata

John Lopata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060274513
    Abstract: A processor mounted to a circuit board is provided with regulated voltage through lower-inductance circuit board traces by mounting a voltage regulator module for the processor, on the side of the circuit opposite to the processor. Current from the voltage regulator is provided to the processor by way of one or more conductors between the regulator and processor that extend through the circuit board from one side to the other. Inductance attributable to lead length is reduced by locating the voltage regulator close to its load. Circuit board space on the processor side of the circuit board is increased by moving the voltage regulator to the opposite side.
    Type: Application
    Filed: June 27, 2006
    Publication date: December 7, 2006
    Inventors: Augusto Panella, John Lopata, James McGrath, Arindum Dutta
  • Publication number: 20050260872
    Abstract: A termination structure for mating a cable connector to a circuit board has a ground terminal and two signal terminals arranged in triangular pattern through the connector in order to reduce the impedance through the connector. The width of the ground terminal increases along its extent with respect to the signal terminals. This increase occurs along either a transition or contact portion of the ground terminal.
    Type: Application
    Filed: July 25, 2005
    Publication date: November 24, 2005
    Inventors: Maxwill Bassler, David Brunker, Daniel Dawiedczyk, John Lopata
  • Publication number: 20050250387
    Abstract: Termination assemblies for terminating high-frequency data signal transmission lines include housings with one or more cavities that receive ends of the transmission line therein. The transmission line typically includes a dielectric body and a plurality of conductive elements disposed thereon, with the plurality of conductive elements being arranged in pairs for differential signal transmission. The termination assemblies, in one embodiment include hollow end caps that are formed from a dielectric and which have one or more conductive contacts or plated surfaces disposed on or within the cavity so that they will frictionally mate with the conductive traces on the transmission line. In another embodiment, a connector housing is provided with a center slot and a plurality of dual loop contacts to provide redundant circuit paths and low inductance to the termination assembly. A coupling element may be utilized in the slot to achieve a desired level of coupling between the termination contacts.
    Type: Application
    Filed: July 15, 2005
    Publication date: November 10, 2005
    Inventors: David Brunker, Daniel Dawiedczyk, John Lopata, Arindum Dutta
  • Publication number: 20050092513
    Abstract: Termination assemblies for terminating high-frequency data signal transmission lines include housings with one or more cavities that receive ends of the transmission line therein. The transmission line typically includes a dielectric body and a plurality of conductive elements disposed thereon, with the plurality of conductive elements being arranged in pairs for differential signal transmission. The termination assemblies, in one embodiment include hollow end caps that are formed from a dielectric and which have one or more conductive contacts or plated surfaces disposed on or within the cavity so that they will frictionally mate with the conductive traces on the transmission line. In another embodiment, a connector housing is provided with a center slot and a plurality of dual loop contacts to provide redundant circuit paths and low inductance to the termination assembly. A coupling element may be utilized in the slot to achieve a desired level of coupling between the termination contacts.
    Type: Application
    Filed: November 30, 2004
    Publication date: May 5, 2005
    Inventors: David Brunker, Daniel Dawiedczyk, John Lopata, Arindum Dutta
  • Patent number: 6888235
    Abstract: Systems for power delivery to an integrated circuit include a decoupling capacitance located in a connector that is formed as a socket, or frame for the IC. The power delivery system delivers power to the IC along various surfaces thereof by way of a plurality of discrete capacitors that are supported by a socket-style connector. The socket-style connector has an insulative body portion that is mounted to a circuit board and has a recess defined thereon that receives the IC therein. A plurality of capacitors are integrated with the body portion and, each of the capacitors supplies a desired amount of power to the IC. The capacitors are charged by way of leads on the circuit board that bring power to current to the capacitors and then are discharged as the IC draws power from the socket such that the capacitors form a power reservoir integrated with the socket, thereby eliminating the need for mounting such capacitors on the circuit board near the IC and freeing up space on the circuit board.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: May 3, 2005
    Assignee: Molex Incorporated
    Inventors: John Lopata, Augusto P. Panella, Arindum Dutta, Jeoffrey Urbanowski
  • Publication number: 20050020100
    Abstract: A land grid array connector is formed by attaching a reinforcing member to a frame and coating the reinforcing member with an elastomeric compound to form a reinforced, flexible body portion of the connector. Conductive wires are inserted in pairs in an array in the fabric extent. Free ends of the wires extend past the elastomeric compound to provide contacts of the connector. The pairs of wires provide redundancy for the contacts to ensure a reliable connection.
    Type: Application
    Filed: November 6, 2003
    Publication date: January 27, 2005
    Inventors: James McGrath, John Lopata, Arindum Dutta, Marvin Menzin, Daniel Fisher
  • Patent number: 6493368
    Abstract: A lateral injection VCSEL comprises upper and lower mirrors forming a cavity resonator, an active region disposed in the resonator, high conductivity upper and lower contact layers located on opposite sides of the active region, upper and lower electrodes disposed on the upper and lower contact layers, respectively, and on laterally opposite sides of the upper mirror, and a current guide structure including an apertured high resistivity layer for constraining current to flow in a relatively narrow channel through the active region, characterized in that a portion of the lower contact layer that extends under the top electrode has relatively high resistivity. This feature of our invention serves two purposes. First, it suppresses current flow in parallel paths and, therefore, tends to make the current density distribution in the aperture more favorable for the fundamental mode. Second, it reduces parasitic capacitance.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: December 10, 2002
    Assignee: Agere Systems Inc.
    Inventors: Leo Maria Chirovsky, Lucian Arthur D'Asaro, William Scott Hobson, John Lopata
  • Patent number: 5861665
    Abstract: Disclosed is an optical and/or microelectronics hermetic package which includes a member for absorbing hydrogen from the internal package ambient. The member includes a first layer which forms a hydride and, formed thereover, a second layer which forms solvated hydrogen upon exposure to molecular hydrogen in the package. The second layer acts as a one way valve for transporting hydrogen to the first layer which locks up the hydrogen.
    Type: Grant
    Filed: May 13, 1997
    Date of Patent: January 19, 1999
    Assignee: Lucent Technologies Inc.
    Inventors: Gustav Edward Derkits, Jr., John Lopata, Franklin Richard Nash
  • Patent number: 5527425
    Abstract: In-containing III/V semiconductor materials (e.g., InGaP) can be dry etched in BCl.sub.3 in ECR apparatus. We have discovered that addition of N.sub.2 to the BCl.sub.3 can result in substantially higher etch rate (e.g., more than 50% higher). Etching is substantially without incubation period, and the resulting surface can be very smooth (e.g., RMS roughness less than 5 nm, even less than 2.5 nm). Exemplarily, the novel etching step is used in the manufacture of a InGaP/GaAs transistor.
    Type: Grant
    Filed: July 21, 1995
    Date of Patent: June 18, 1996
    Assignee: AT&T Corp.
    Inventors: William S. Hobson, John Lopata, Fan Ren
  • Patent number: 5212395
    Abstract: This invention pertains to a p-i-n In.sub.0.53 Ga.sub.0.47 As photodiode having an optically transparent composite top electrode consisting of a thin semitransparent metal layer from 10 to 40 nm thick and a transparent cadmium tin oxide (CTO) layer from 90 to 600 nm thick. The metal layer makes a non-alloyed ohmic contact to the semiconductor surface, acts as a barrier between the semiconductor and the CTO preventing oxidation of the semiconductor from the O.sub.2 in the plasma during reactive magnetron sputtering of the CTO layer, and prevents formation of a p-n junction between the semiconductor and CTO. The CTO functions as the n or p contact, an optical window and an anti-reflection coating. The top electrode also avoids shadowing of the active layer by the top electrode, thus allowing greater collection of incident light. Since the top electrode is non-alloyed, inter-diffusion into the i-region is not relevant, which avoids an increased dark current.
    Type: Grant
    Filed: March 2, 1992
    Date of Patent: May 18, 1993
    Assignee: AT&T Bell Laboratories
    Inventors: Paul R. Berger, Alfred Y. Cho, Niloy K. Dutta, John Lopata, Henry M. O'Bryan, Jr., Deborah L. Sivco, George J. Zydzik
  • Patent number: 5208821
    Abstract: This invention pertains to buried heterostructure lasers which have been fabricated using a single step MOCVD growth of an MQW laser structure over a pattern etched GaAs substrate. The wet chemical etching of grooves having a dovetailed cross-section and being parallel to the [011] direction in GaAs substrates produced reentrant mesas which resulted in isolated laser active regions buried by the AlGaAs cladding layer. The 250 .mu.m long uncoated lasers emit at about 1 .mu.m. Lasers with coated facets have threshold currents of 20 mA and emit >100 mW per facet under room temperature operation. The external differential quantum efficiency for currents of from 30 mA to about 50 mA is found to be nearly independent of temperature in the range of 10.degree. C. to 90.degree. C. suggesting a low temperature dependence of leakage current.
    Type: Grant
    Filed: January 24, 1992
    Date of Patent: May 4, 1993
    Assignee: AT&T Bell Laboratories
    Inventors: Paul R. Berger, Niloy K. Dutta, William S. Hobson, John Lopata