Abstract: A TDM data distribution system (10) includes a hub unit (12) with a multipoint transmitter (24) and any number of subscriber units (14), each of which has a multipoint receiver (28). A forward communication link (16) transmitted by the hub unit (12) exhibits a substantially constant baud and carrier frequency over a number of diverse modulation format (MF) time slots (42). However, the different MF slots (42) convey data using different modulation formats. Modulation order and coding rate may vary for different modulation formats. The multipoint transmitter (24) includes a number of encoding FEC processors (48), wherein each encoding FEC processor (48) is active only for selected ones of the different MF slots (42). When inactive, the internal states of the encoding FEC processors (48) are frozen. Each multipoint receiver (28) includes a decoding FEC processor (108) which is active only for MF slots (42) assigned to the same modulation format for which the decoding FEC processors (108) are programmed.

Abstract: An IC modulation processor (28) may be configured to operate in a single chip mode to accommodate baud rates up to a maximum clock rate for the processor (28) and in a dual chip mode to accommodate baud rates in excess of the maximum clock rate. The IC modulation processor (28) performs digital processing on a communication signal which conveys an input data stream (22). A pulse shaping filter (54-57) is provided following a phase mapper (50). The pulse shaping filter (54-57) is implemented as a pair of half-filters. Pulse shaping is distributed between two IC modulation processors (28) in the dual chip mode. An interpolator (86) and linearizer (106) follow the pulse shaping filters (54-57).

Abstract: An IC modulation processor (28) may be configured to operate in a single chip mode to accommodate baud rates up to a maximum clock rate for the processor (28) and in a dual chip mode to accommodate baud rates in excess of the maximum clock rate. The IC modulation processor (28) performs digital processing on a communication signal which conveys an input data stream (22). A pulse shaping filter (54-57) is provided following a phase mapper (50). The pulse shaping filter (54-57) is implemented as a pair of half-filters. Pulse shaping is distributed between two IC modulation processors (28) in the dual chip mode. An interpolator (86) and linearizer (106) follow the pulse shaping filters (54-57).

Abstract: A node controller (30) within a data communication network (22) provides network access for a digital data stream (32). A processor (42) partitions the digital data stream (32) into a constant data rate component (44) having a predictable data rate and a data packet component (46) having an unpredictable data rate. The constant data rate component (44) is then transferred over a first portion (74) of a network data stream (26) reserved for a circuit transmission protocol, and the data packet component (46) is packetized and transferred over a second portion (76) of the network data stream (26) reserved for a packet transmission protocol.

Abstract: A digital communication system (20) communicates using a polar amplitude phase shift keyed (P-APSK) phase point constellation (70, 70', 70"). Pragmatic encoding is accommodated using the constellation (70, 70', 70") to simultaneously communicate both encoded and uncoded information bits (69, 51). The constellation (70, 70', 70") has an even number of phase point rings (74) and equal numbers of phase points (72) in ring pairs (75, 76, 77). Encoded information bits (69) specify secondary modulation and uncoded information bits (51) specify primary modulation. The constellation (70, 70', 70") is configured so secondary sub-constellations (78) include four phase points (72) arranged so that two of the four phase points (72) exhibit two phase angles at one magnitude and the other two of the four phase points (72) exhibit phase angles that are at another magnitude. The difference between the phase angles at different magnitudes within a secondary sub-constellation (78) is constant.

Abstract: A communication system (11) uses concatenated coding in which an inner code is configured to match the needs of an outer code. The inner code is implemented through a pragmatic trellis coded modulation encoder (18) and decoder (34). A parser (50) of the encoder (18) distributes fewer than one user information bit per unit interval (66) to a convolutional encoder (58) which generates at least two convolutionally encoded bits for each user information bit it processes. Exactly one of the convolutionally encoded bits is phase mapped (56) with at least two user information bits during each unit interval (66). The decoder (34) detects a frame sync pattern (48) inserted into the user information bits to resolve phase ambiguities. Phase estimates are convolutionally decoded (100) to provide decoded data estimates that are then used to selectively rotate the phase estimates prior to routing the phase estimates to a slice detector (118).

Abstract: A digital communication system (20) communicates using a polar amplitude phase shift keyed (P-APSK) phase point constellation (70, 70'). Pragmatic encoding and puncturing is accommodated. The pragmatic encoding uses the P-APSK constellation (70, 70') to simultaneously communicate both encoded and uncoded information bits. The P-APSK constellation (70, 70') has an even number of phase point rings (74, 76) and equal numbers of phase points (72) in pairs of the rings (74, 76). Encoded bits specify secondary modulation and uncoded bits specify primary modulation. The constellation (70, 70') is configured so that secondary modulation sub-constellations (78) include four phase points (72) arranged so that two of the four phase points (72) exhibit two phase angles at one magnitude and the other two of the four phase points exhibit phase angles that are at another magnitude. The difference between the phase angles at different magnitudes within a secondary sub-constellation (78) is constant.

Abstract: A communication system (10) includes a rotationally invariant pragmatic trellis coded modulator (18) and demodulator (34). The modulator (18) partitions information bits (20) into primary (42) and secondary (44) data streams. The secondary data stream (44) is convolutionally encoded (70) then fed to the LSB of a phase mapper (76). The phase mapper (76) is arranged so that all pairs of adjacent phase data are generated from pairs of opposing polarity LSB inputs. The primary data stream (42) is differentially encoded through a dual channel differential encoder (50). The demodulator (34) convolutionally decodes (90) the secondary stream, then re-encodes (96) secondary stream estimates. The re-encoded secondary stream estimates are used to remove (102) the secondary modulation from phase value estimates. Adjusted phase value estimates are phase demodulated (104) and differentially decoded using a dual channel differential decoder (106).

Abstract: A communication system (10) includes a rotationally invariant pragmatic trellis coded modulation (PTCM) encoder (18) and decoder (34). The PTCM encoder (18) partitions information bits (20) into primary (42) and secondary (44) data streams. A pilot bit (56) is inserted into the secondary data stream (44) during each frame (46). The secondary stream (44) then receives rate 1/2 convolutional encoding (60) that is punctured to a rate of 9/16. The primary data stream (42) is differentially encoded (50). The encoded primary and secondary streams are concurrently phase mapped (70) using an 8-PSK constellation so that an effective code rate of 5/6 results. The PTCM decoder (34) convolutionally decodes (84) the secondary stream, then re-encodes secondary stream estimates using a systematic, transparent convolutional encoder (88). The pilot bit is evaluated (92) in the re-encoded symbol estimates (90) to detect and correct any secondary stream inversion that may have occurred due to phase ambiguity.

Abstract: A selectable demodulator (32) operates in the phase domain to implement a coherent demodulation path (40) and a differentially coherent demodulation path (42). The coherent path (40) includes a differential encoder circuit (46) to produce coherently demodulated differential data. Magnitude converters (62, 62') convert phase errors in each path into magnitude values. A comparison circuit (66) compares magnitude values from the two paths (40, 42) and selects the path encountering the least phase error. A selection circuit (60) provides data codes demodulated in accordance with the selection.