Abstract: An arrangement (FIG. 1) that allows banks (15, 25) of up to eight duplicated active devices (30-37, 40-47) to be connected to a SCSI bus (14) and to share SCSI device IDs, and also allows multiple hosts (10, 20) to share the SCSI bus and the connected active devices. Tri-state buffers (200) act as gates (13, 23, 38, 48) to interface host adapters (12, 24) of a plurality of hosts, and active devices of a plurality of device banks, to the SCSI bus. The gate of only one host adapter and the gates of only one bank of devices are enabled at any one time. Only the devices of the enabled bank can receive and respond to addresses from the SCSI bus, while the devices of the other banks are prevented from receiving and responding to addresses from the SCSI bus. Each host has a tri-state buffer acting as bank selector (16, 26) for selecting one of the device banks, by enabling the gates of the devices of the selected bank through a bank select bus (50). Only one host's bank selector is enabled at any one time.

Abstract: An arrangement for securing data transmissions to and from one data device from among a plurality of data devices sharing a common interface is disclosed. In a data communication network, a master communication bus connects to a plurality of data transmitting and receiving devices via a single interface. The disclosed arrangement provides circuitry in the common interface which generates a jamming signal to all devices connected to the interface except for that one device which is either transmitting or receiving a data-transmission. The jamming signal inhibits all the connected devices from monitoring and detecting the data transmission processes of the interface. The one transmitting and receiving device is enabled to either transmit or receive data during the generation of the jamming signal which ensures a secure data transmission and prevents "eavesdropping" by the other devices. The jamming signal is removed at the conclusion of the data transmission to or from the one device.

Abstract: A data transmission flow control arrangement for controlling the flow of data packets to a network as tramsmitted by one or more data transmitting and receiving devices via an interface is disclosed. The disclosed flow control arrangement provides circuitry in the interface responsive to the storage capacity of a buffer included in the interface. If the buffer contains sufficient space to store a data packet of maximum length, data transmissions continue unencumbered. However, if the buffer contains insufficient space to accomodate a data packet of maximum length, the specialized circuitry of the interface responds to this condition and applies a signal to all of the associated transmitting and receiving devices of the interface. The jamming signal simulates the conditions associated with a busy network and therefore, inhibits the transmission of data from any of the associated transmitting and receiving devices.