Patents by Inventor John M. Parsey, Jr.

John M. Parsey, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of forming a semiconductor die cutting tool
    Patent number: 10340160
    Abstract: In one embodiment, a method of singulating semiconductor die from a semiconductor wafer includes forming a material on a surface of a semiconductor wafer and reducing a thickness of portions of the material. Preferably, the thickness of the material is reduced near where singulation openings are to be formed in the semiconductor wafer.
    Type: Grant
    Filed: October 16, 2015
    Date of Patent: July 2, 2019
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Gordon M. Grivna, John M. Parsey, Jr.
  • Semiconductor die singulation method
    Patent number: 9012304
    Abstract: In one embodiment, a method of singulating semiconductor die from a semiconductor wafer includes forming a material on a surface of a semiconductor wafer and reducing a thickness of portions of the material. Preferably, the thickness of the material is reduced near where singulation openings are to be formed in the semiconductor wafer.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: April 21, 2015
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Gordon M. Grivna, John M. Parsey, Jr.
  • Semiconductor die singulation method
    Patent number: 8859396
    Abstract: In one embodiment, a method of singulating semiconductor die from a semiconductor wafer includes forming a material on a surface of a semiconductor wafer and reducing a thickness of portions of the material. Preferably, the thickness of the material is reduced near where singulation openings are to be formed in the semiconductor wafer.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: October 14, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Gordon M. Grivna, John M. Parsey, Jr.
  • SEMICONDUCTOR DIE SINGULATION METHOD
    Publication number: 20120244681
    Abstract: In one embodiment, a method of singulating semiconductor die from a semiconductor wafer includes forming a material on a surface of a semiconductor wafer and reducing a thickness of portions of the material. Preferably, the thickness of the material is reduced near where singulation openings are to be formed in the semiconductor wafer.
    Type: Application
    Filed: June 1, 2012
    Publication date: September 27, 2012
    Inventors: Gordon M. Grivna, John M. Parsey, JR.
  • SEMICONDUCTOR DIE SINGULATION METHOD
    Publication number: 20110244657
    Abstract: In one embodiment, a method of singulating semiconductor die from a semiconductor wafer includes forming a material on a surface of a semiconductor wafer and reducing a thickness of portions of the material. Preferably, the thickness of the material is reduced near where singulation openings are to be formed in the semiconductor wafer.
    Type: Application
    Filed: June 9, 2011
    Publication date: October 6, 2011
    Inventors: Gordon M. Grivna, John M. Parsey, JR.
  • Semiconductor device having deep trench charge compensation regions and method
    Patent number: 7902601
    Abstract: In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a charge compensating trench formed in proximity to active portions of the device. The charge compensating trench includes a trench filled with various layers of semiconductor material including opposite conductivity type layers.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: March 8, 2011
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Gary H. Loechelt, John M. Parsey, Jr., Peter J. Zdebel, Gordon M. Grivna
  • Method of forming a semiconductor device having trench charge compensation regions
    Patent number: 7799640
    Abstract: In one embodiment, a method of forming a semiconductor device with trench charge compensation structures includes exposing the trench sidewalls to a reduced temperature hydrogen desorption process to enhance the formation of monocrystalline semiconductor layers.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: September 21, 2010
    Assignee: Semiconductor Components Industries, LLC
    Inventors: John M. Parsey, Jr., Gordon M. Grivna, Shanghui L. Tu
  • SEMICONDUCTOR DEVICE HAVING DEEP TRENCH CHARGE COMPENSATION REGIONS AND METHOD
    Publication number: 20090096021
    Abstract: In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a charge compensating trench formed in proximity to active portions of the device. The charge compensating trench includes a trench filled with various layers of semiconductor material including opposite conductivity type layers.
    Type: Application
    Filed: December 16, 2008
    Publication date: April 16, 2009
    Inventors: Gary H. Loechelt, John M. Parsey, JR., Peter J. Zdebel, Gordon M. Grivna
  • Semiconductor device having deep trench charge compensation regions and method
    Patent number: 7482220
    Abstract: In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a charge compensating trench formed in proximity to active portions of the device. The charge compensating trench includes a trench filled with various layers of semiconductor material including opposite conductivity type layers.
    Type: Grant
    Filed: October 19, 2006
    Date of Patent: January 27, 2009
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventors: Gary H. Loechelt, John M. Parsey, Jr., Peter J. Zdebel, Gordon M. Grivna
  • METHOD OF FORMING A SEMICONDUCTOR DEVICE HAVING TRENCH CHARGE COMPENSATION REGIONS
    Publication number: 20080081440
    Abstract: In one embodiment, a method of forming a semiconductor device with trench charge compensation structures includes exposing the trench sidewalls to a reduced temperature hydrogen desorption process to enhance the formation of monocrystalline semiconductor layers.
    Type: Application
    Filed: September 28, 2006
    Publication date: April 3, 2008
    Inventors: John M. Parsey, Jr., Gordon M. Grivna, Shanghui L. Tu
  • Semiconductor metallization structure
    Patent number: 6140703
    Abstract: A high temperature metallization system for use with a semiconductor device (23). The semiconductor device (23) has a multi-layer metallization system (36). An adhesion layer (37) of the metallization system (36) is formed on a semiconductor substrate (20). A barrier layer (38) that contains a nickel alloy is formed on the adhesion layer (37). A protective layer (39) is formed on the barrier layer (38). The barrier layer (38) inhibits solder components from diffusing toward the semiconductor substrate (20) during high temperature processing.
    Type: Grant
    Filed: December 26, 1996
    Date of Patent: October 31, 2000
    Assignee: Motorola, Inc.
    Inventors: Wayne A. Cronin, Brian L. Scrivner, Kirby F. Koetz, John M. Parsey, Jr.
  • Semiconductor device having a vertically-oriented conductive region that electrically connects a transistor structure to a substrate
    Patent number: RE45365
    Abstract: In one embodiment, a semiconductor device is formed in a body of semiconductor material. The semiconductor device includes a charge compensating trench formed in proximity to active portions of the device. The charge compensating trench includes a trench filled with various layers of semiconductor material including opposite conductivity type layers.
    Type: Grant
    Filed: September 5, 2013
    Date of Patent: February 10, 2015
    Assignee: Semiconductor Components Industries
    Inventors: Gary H. Loechelt, John M. Parsey, Jr., Peter J. Zdebel, Gordon M. Grivna