Abstract: Example channel circuits, data storage devices, and methods for asynchronous sampling from an oversampled analog-to-digital converter are described. The channel circuit may include an analog-to-digital converter configured to generate an oversampled digital signal from an analog data signal using a sample rate that is an integer multiple of the baud rate of the channel circuit. A digital sample interpolator may then interpolate interpolated digital signal values from multiple signal values of the oversampled digital signal and select values at baud rate to generate a baud rate digital signal. The baud rate digital signal may be used by an iterative detector in a timing loop and, once a target timing is achieved, for the iterative detector to detect data bits from the interpolated digital signal.

Abstract: An overhead arm assembly for a patient support apparatus includes a user interface device. The user interface device has a support structure for supporting a personal digital assistant and a charging port for personal digital assistant.

Abstract: A dynamization device includes a first module and a second module. The first and second modules are each rigidly affixed to and mated together by one or more deformable rings. Each of the first and second modules includes an inner column positioned within the one or more deformable rings. The mated first and second modules form a first displacement gap between the inner column of the first module and the inner column of the second module. The first displacement gap extends along the longitudinal axis between adjacent deformable rings of the one or more deformable rings.

Abstract: A circuit providing voltage cell balancing is provided. The circuit includes a cell balancing network comprising separate switching circuits, each being configured to balance a respective cell voltage for a respective cell of a plurality of voltage cells based on a respective switching control signal. A control circuit includes a plurality of current sources, each of the plurality of current sources selectively connected to a respective one of the separate switching circuits to independently control operation of each of the separate switching circuits of the cell balancing network to balance the voltage across the plurality of voltage cells.

Abstract: A circuit providing voltage cell balancing is provided. The circuit includes a cell balancing network comprising separate switching circuits, each being configured to balance a respective cell voltage for a respective cell of a plurality of voltage cells based on a respective switching control signal. A control circuit includes a plurality of current sources, each of the plurality of current sources selectively connected to a respective one of the separate switching circuits to independently control operation of each of the separate switching circuits of the cell balancing network to balance the voltage across the plurality of voltage cells.

Abstract: A system and method is presented for dividing a reference clock frequency by any real number. The invention allows for a real number divisor that could have any desired degree of precision. Additionally, the invention seeks to minimize hardware complexity in realizing such a reference-clock frequency divider. In one particular embodiment of the invention, a system and method is presented, wherein the real number divisor is a real number having a repeating decimal (i.e., the real number may be represented by a fraction).

Abstract: An integrated circuit memory device comprising an arrangement of physical wordlines, WL0-WLn, arrange such that each wordline is addressed by a plurality of pairs, An+1, An, of logical row address bits, and such that at least one pair of logical row address bits, corresponding to physically adjacent wordlines Wlm, Wlm+1, Wlm+2 in succession, cycles between binary states which encode the ternary results A, B and C in succession. The ternary results A, B or C are used to determine which two bitlines of a possible three bitlines are selected by a multiplexer which connects the bitlines to a sense amplifier for determining the state of a bit stored in a memory cell accessed by an activated wordline and a selected bitline. Preferably, the ternary results A, B and C are respectively encoded by said binary states of said pair of logical row address bits, said binary states being “00,” “01,” and “10” respectively.

Abstract: An asynchronous multiphase switching method and apparatus are disclosed which transfers a system load between two asynchronous AC power sources in an improved manner. It operates as a make-before-break switch to provide uninterrupted power to the system load during the transfer while minimizing voltage and current fluctuations. The control circuitry allows energy to be supplied to the load during the transition without allowing current to flow between the power sources. A matrix of SCRs is used to transfer the load between the two power sources. The switches to be gated are determined by the relative timing relationships of the existing and takeover voltage waveforms. By altering the pattern of the switches which are gated and by controlling the direction of energy flow, the transition can be made between the power sources without interruption of power.

Abstract: This relates to the forming of a seal between a container and a top element, such as a fitment, wherein the seal is subjected to a high top loading of a nature wherein conventional gasket materials, such as plastisols, will unduly flow and result in leakage. In lieu of the conventional gasket material, a hot melt material is utilized with the hot melt material being in a flowable state when the fitment is applied to the container and held in place by a mechanical interlock between the fitment and the container so as to cause an extrusion and flowing of certain of the hot melt material wherein the hot melt material functions both as a gasket and as a support to eliminate or restrain movement between the fitment and the container due to top loading. A special dispensing head is also provided for applying a controlled volume of hot melt material to each fitment in a preselected pattern.

Abstract: This relates to a pneumatic feed system for moving a labeler head of a labeling apparatus for depositing labels in mold halves of a blow molding apparatus. The relatively heavy labeler head must be rapidly accelerated and then rapidly decelerated and at the same time moved sufficiently so as to provide for a large number of back and forth cycles per minute. There is provided in association with compressible shock absorbers a pneumatic system including a high pressure supply and a low pressure supply together with throttle valves such that the gas in the unpressurized end of the cylinder is rapidly compressed near the end of the stroke to function as a shock absorber and further, the cylinder is of a much larger diameter than that required for moving the labeler head so as to permit for the rapid acceleration as well as the rapid deceleration.

Abstract: Apparatus and method for stabilizing and supporting a crystal semiconductor rod during fabrication refining from the action of a seed rod on a float zone melt of a crystalline rod source is provided wherein engageable fingers mounted in a vertically movable tube in axial register with the shaft holding the crystal seed rod are pivotally mounted in a non-horizontal upward position, the finger tips being force loaded for inward movement upon removal of a sleeve carrier so that the fingers engage, support, and stabilize the irregular cylindrical surface of the refined semiconductor rod. The tube and fingers are engageable through sleeve and tube piston means resulting in uniform stabilization and support of the crystal refined rod. The apparatus and method prevent the refined rod from vibrating and oscillating about its axis; thus allowing enlarged dislocation free crystal rod growth from a crystalline rod source, said refined crystal rod being grown on a slender seed rod.