Abstract: LGA (land grid array) interposers having variable pitch connectors and distribution wiring to support space transforming I/O interconnections between first level chip modules and second level packaging. Apparatus and methods for constructing high-performance electronic modules (such as processor modules for computer systems) using LGA interposers that provide space transform I/O interconnections between fine pitch I/O contacts on a chip module and coarse pitch contacts on a circuit board.

Abstract: A Silicon Based Package (SBP) is formed starting with a thick wafer, which serves as the base for the SBP, composed of silicon which has a first surface and a reverse surface which are planar. Then form an interconnection structure including metal capture structures in contact with the first surface and multilayer conductor patterns over the first surface. Form a temporary bond between the SBP and a wafer holder, with the wafer holder being a rigid structure. Thin the reverse side of the wafer to a desired thickness to form an Ultra Thin Silicon Wafer (UTSW) for the SBP. Form via holes with tapered or vertical sidewalls, which extend through the UTSW to reach the metal capture structures. Then form metal pads in the via holes which extend through the UTSW, making electrical contact to the metal capture structures. Then bond the metal pads in the via holes to pads of a carrier.

Abstract: A semiconductor micro-electromechanical system (MEMS) switch provided with noble metal contacts that act as an oxygen barrier to copper electrodes is described. The MEMS switch is fully integrated into a CMOS semiconductor fabrication line. The integration techniques, materials and processes are fully compatible with copper chip metallization processes and are typically, a low cost and a low temperature process (below 400° C.). The MEMS switch includes: a movable beam within a cavity, the movable beam being anchored to a wall of the cavity at one or both ends of the beam; a first electrode embedded in the movable beam; and a second electrode embedded in an wall of the cavity and facing the first electrode, wherein the first and second electrodes are respectively capped by the noble metal contact.

Abstract: An inductor and a method of forming and the inductor, the method including: (a) forming a dielectric layer on a top surface of a substrate; (b) forming a lower trench in the dielectric layer; (c) forming a resist layer on a top surface of the dielectric layer; (d) forming an upper trench in the resist layer, the upper trench aligned to the lower trench, a bottom of the upper trench open to the lower trench; and (e) completely filling the lower trench at least partially filling the upper trench with a conductor in order to form the inductor. The inductor including a top surface, a bottom surface and sidewalls, a lower portion of said inductor extending a fixed distance into a dielectric layer formed on a semiconductor substrate and an upper portion extending above said dielectric layer; and means to electrically contact said inductor.

Abstract: Apparatus and methods are provided for microchannel cooling of electronic devices such as IC chips, which enable efficient and low operating pressure microchannel cooling of high power density electronic devices having a non-uniform power density distribution, which are mounted face down on a package substrate. For example, integrated microchannel cooler devices (or microchannel heat sink devices) for cooling IC chips are designed to provide uniform flow and distribution of coolant fluid and minimize pressure drops along coolant flow paths, as well as provide variable localized cooling capabilities for high power density regions (or “hot spots”) of IC chips with higher than average power densities.

Abstract: Apparatus and methods are provided for microchannel cooling of electronic devices such as IC chips, which enable efficient and low operating pressure microchannel cooling of high power density electronic devices. Apparatus for microchannel cooling include integrated microchannel heat sink devices and fluid distribution manifold structures that are designed to provide uniform flow and distribution of coolant fluid and minimize pressure drops along coolant flow paths.

Abstract: An inductor and a method of forming and the inductor, the method including: (a) providing a semiconductor substrate; (b) forming a dielectric layer on a top surface of the substrate; (c) forming a lower trench in the dielectric layer; (d) forming a resist layer on a top surface of the dielectric layer; (e) forming an upper trench in the resist layer, the upper trench aligned to the lower trench, a bottom of the upper trench open to the lower trench; and (f) completely filling the lower trench at least partially filling the upper trench with a conductor in order to form the inductor. The inductor including a top surface, a bottom surface and sidewalls, a lower portion of said inductor extending a fixed distance into a dielectric layer formed on a semiconductor substrate and an upper portion extending above said dielectric layer; and means to electrically contact said inductor.

Abstract: In an integrated circuit packaging structure, such as in an MCM or in a SCM, a compliant thermally conductive material is applied between a heat-generating integrated circuit chip and a substrate attached thereto. Raised regions are defined on the back side of the chip aligned to areas of a higher than average power density on the front active surface of the chip such that a thinner layer of the compliant thermally conductive material is disposed between the chip and the substrate in this area after assembly thereof resulting in a reduced “hot-spot” temperature on the chip. In an exemplary embodiment, the substrate includes one of a heat sink, cooling plate, thermal spreader, heat pipe, thermal hat, package lid, or other cooling member.

Abstract: An optoelectronic assembly for a computer system includes an electronic chip(s), a substrate, an electrical signaling medium, an optoelectronic transducer, and an optical coupling guide. The electronic chip(s) is in communication with the substrate, which is in communication with a first end of the electrical signaling medium. A second end of the electrical signaling medium is in communication with the optoelectronic transducer, and includes the optical coupling guide for aligning an optical signaling medium with the optoelectronic transducer. An electrical signal from the electronic chip is communicated to the optoelectronic transducer via the substrate and the electrical signaling medium. The optical transducer and electronic chip(s) share a common heat spreader, and communication to other groups of electronic chip(s) is done without the need for communication via a second level electrical package.

Abstract: A semiconductor micro-electromechanical system (MEMS) switch provided with noble metal contacts that act as an oxygen barrier to copper electrodes is described. The MEMS switch is fully integrated into a CMOS semiconductor fabrication line. The integration techniques, materials and processes are fully compatible with copper chip metallization processes and are typically, a low cost and a low temperature process (below 400°0 C.). The MEMS switch includes: a movable beam within a cavity, the movable beam being anchored to a wall of the cavity at one or both ends of the beam; a first electrode embedded in the movable beam; and a second electrode embedded in an wall of the cavity and facing the first electrode, wherein the first and second electrodes are respectively capped by the noble metal contact.