Abstract: Provided are a method, system and article of manufacture, wherein a first application executes at least two threads corresponding to a simultaneous multi-threaded processor whose resources have been acquired by the first application. The at least two threads are synchronized before releasing the simultaneous multi-threaded processor to a second application.

Abstract: Provided are a method, system, and program for handling a fabric failure. A module intercepts a signal indicating a failure of a path in a fabric providing a connection to a shared device. The module generates an interrupt to a device driver in an operating system providing an interface to the shared device that is inaccessible due to the path failure. The device driver requests information from the module on a status of a plurality of devices that are not accessible due to the path failure and receives information indicating the inaccessible device. The device driver reconfigures to discontinue use of the inaccessible device.

Abstract: Provided are a method, system, and article of manufacture, wherein in certain embodiments, a plurality of logical memory blocks corresponding to a memory in a computational device are allocated. An attribute is associated with at least one logical memory block, wherein the attribute indicates whether the at least one logical memory block can be swapped from the memory, and wherein physical blocks corresponding to the at least one logical memory block are contiguous.

Abstract: Provided are a method, system, and program for configuring shared devices over a fabric. A module in a first processing complex configures a first part of a fabric enabling communication with a set of devices accessible through the first part of the fabric. The module detects a located device accessible through a second part of the fabric, wherein a second processing complex is designated to configure the second part of the fabric and the located device. The module determines whether the second processing complex is available in response to detecting the uninitialized device. The module passes to a device driver in the first processing complex an uninitialized property for the located device. The device driver requests the module to configure the second part of the fabric to enable access to the located device over the second part of the fabric in response to determining that the located device has the uninitialized property.

Abstract: A determination is made as to whether a configuration indicator associated with a resource indicates a delayed configuration of the resource, wherein the resource is shared by a plurality of processing complexes via a bus, and wherein if the delayed configuration of the resource is indicated then the resource is prevented from being configured during initial program loads of the plurality of processing complexes. The resource is configured by only one of the of plurality of processing complexes that shares the resource, in response to determining that the configuration indicator associated with the resource indicates the delayed configuration of the resource.

Abstract: Provided are a method, system, and program for handling a fabric failure. A module intercepts a signal indicating a failure of a path in a fabric providing a connection to a shared device. The module generates an interrupt to a device driver in an operating system providing an interface to the shared device that is inaccessible due to the path failure. The device driver requests information from the module on a status of a plurality of devices that are not accessible due to the path failure and receives information indicating the inaccessible device. The device driver reconfigures to discontinue use of the inaccessible device.

Abstract: Provided is a method for handling a fabric failure. A module intercepts a signal indicating a failure of a path in a fabric providing a connection to a shared device. The module generates an interrupt to a device driver in an operating system providing an interface to the shared device that is inaccessible due to the path failure. The device driver requests information from the module on a status of a plurality of devices that are not accessible due to the path failure and receives information indicating the inaccessible device. The device driver reconfigures to discontinue use of the inaccessible device.

Abstract: Provided are a method, system, and article of manufacture, wherein in certain embodiments, a plurality of logical memory blocks corresponding to a memory in a computational device are allocated. An attribute is associated with at least one logical memory block, wherein the attribute indicates whether the at least one logical memory block can be swapped from the memory, and wherein physical blocks corresponding to the at least one logical memory block are contiguous.

Abstract: Provided are a method, system and program for processing complexes to access shared devices. A lock to a plurality of shared devices is maintained and accessible to a first and second processing systems. The first processing complex determines a first delay time and the second processing complex determines a second delay time. The first processing complex issues a request for the lock in response to expiration of the first delay time and the second processing complex issues a request for the lock in response to expiration of the second delay time.

Abstract: Processor(s) operating a random access memory is subject to reboot processing which comprises clearing the random access memory. Registration is provided of a portion of the random access memory, the registration indicating that data stored in the registered portion of the random access memory is to be preserved during the reboot processing. In reboot processing, the processor responds to the registration, preventing data stored in the registered portion from clearing during the reboot processing.

Abstract: A delay interval is calculated for a processor that attempts to reserve a reserved shared resource in a multiprocessing system. The delay interval is based on the relationship of a requesting processor and a reservation holding processor. Each delay interval is unique without consistent bias against a processor. The requesting processor queries the reservation status of a shared resource without invalidating an existing reservation. If a shared resource is reserved, the requesting processor waits for an amount of time corresponding to the delay interval before again attempting to reserve the shared resource. The present invention substantially reduces arbitration conflicts within multiprocessor systems.

Abstract: Processor(s) operating a random access memory is subject to reboot processing which comprises clearing the random access memory. Registration is provided of a portion of the random access memory, the registration indicating that data stored in the registered portion of the random access memory is to be preserved during the reboot processing. In reboot processing, the processor responds to the registration, preventing data stored in the registered portion from clearing during the reboot processing.

Abstract: A delay interval is calculated for a processor that attempts to reserve a reserved shared resource in a multiprocessing system. The delay interval is based on the relationship of a requesting processor and a reservation holding processor. Each delay interval is unique without consistent bias against a processor. The requesting processor queries the reservation status of a shared resource without invalidating an existing reservation. If a shared resource is reserved, the requesting processor waits for an amount of time corresponding to the delay interval before again attempting to reserve the shared resource. The present invention substantially reduces arbitration conflicts within multiprocessor systems.

Abstract: A system for providing multiple hosts with concurrent access to cached data by selectively generating, maintaining, modifying, and consolidating multiple versions of data items in cache memory to efficiently accommodate data access requests by the hosts. Data associated with a logical track is represented in cache by a number of cache track image parts. Each part represents one or more records in cache, where multiple parts may exist in cache for the same logical track. The provision of multiple parts supports concurrent access by multiple operations or "processes" to data associated with a track. Namely, each part is given a "status" selected from a predetermined catalog of statuses; the assigned status thus establishes the permissible manner of accessing that part. Depending upon a part's status, the part may be used by one process (e.g. Read) or by multiple processes concurrently (e.g. Read and Destage). Other part statuses dedicate a part to a single process (e.g. Write).

Abstract: A data processing system executes a plurality of processes in parallel. The processes access shared user records stored in memory serially. One or more data structures are used to track access by processes to the data structures and to the user records. Responsive to a fault occurring in a first parallel process, a signal is given the remaining parallel processes indicating the failure. Responsive to the failure, it is determined if the faulting parallel process had access to one of the data structures. Depending upon the circumstances of access, integrity of the user records may be assumed and the record validated. The data structures themselves can be examined to determine if the contents of memory is reliable. Typically the data structures support use of the memory as a cache.

Abstract: A system for providing multiple hosts with concurrent access to cached data by selectively generating, maintaining, modifying, and consolidating multiple versions of data items in cache memory to efficiently accommodate data access requests by the hosts. Data associated with a logical track is represented in cache by a number of cache track image parts. Each part represents one or more records in cache, where multiple parts may exist in cache for the same logical track. The provision of multiple parts supports concurrent access by multiple operations or "processes" to data associated with a track. Namely, each part is given a "status" selected from a predetermined catalog of statuses; the assigned status thus establishes the permissible manner of accessing that part. Depending upon a part's status, the part may be used by one process (e.g. Read) or by multiple processes concurrently (e.g. Read and Destage). Other part statuses dedicate a part to a single process (e.g. Write).

Abstract: The invention teaches a system and method for temporarily buffering data written to a storage system by a host computer. The storage system includes direct access storage devices and a cache. The cache is used as the buffer for both caching and noncaching data records before destaging to a direct access storage device. Upon receipt of a channel program from a host computer containing data for records to be updated, the storage controller determines if the records are currently cached. If the records are not cached, a write miss has occurred. Upon a write miss the storage controller checks an attribute transmitted in the channel program to determine if the records have a regular format. Records having a known, regular format are buffered in cache until destaged by a background process.

Abstract: A method and system are disclosed for enhanced efficiency of backup copying of designated datasets stored within a plurality of storage devices coupled to the data processing system via a storage subsystem control unit having subsystem memory therein. Application execution within the data processing system is temporarily suspended long enough to form a dataset logical-to-physical system address concordance to be utilized to administer copying of the designated dataset. Thereafter, application initiated updates to uncopied portions of the designated datasets are temporarily deferred until sidefiles of the affected portions of the designated datasets are written to subsystem memory. The updates are then written to the storage subsystem. Portions of the designated datasets are then accessed and copied from the storage subsystem on a scheduled or opportunistic basis utilizing selected data retrieval command sequences.