Patents by Inventor John P. Clarkin

John P. Clarkin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9787179
    Abstract: A switching power converter comprising an inductor and one or more switches and configured to operate in a discontinuous operating mode comprises a clamp circuit connected to the ends of the inductor for trapping energy in the inductor during a clamp period. The clamp circuit comprises a first and a second clamp switch connected in series, the clamp circuit arranged and configured to block a voltage of either polarity when both switches are OFF; conduct a current of either polarity when both switches are ON; conduct uni-directionally in one direction when one of the clamp switches is ON; and conduct uni-directionally in the other direction when the other one of the clamp switches is ON. A controller turns the one or more switches ON and OFF to transfer energy from the input to the inductor and from the inductor to the output during an energy transfer phase.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: October 10, 2017
    Assignee: Picor Corporation
    Inventors: John P. Clarkin, Jeffrey Bruce Van Auken
  • Patent number: 9083254
    Abstract: A primary-side sampled feedback system includes a sample acquisition phase during which the voltage across the clamp capacitor is sensed as a measure of the primary-reflect output voltage. One end of the clamp capacitor is ground-referenced during the sample acquisition phase. The sample circuitry, which may include a transformer-coupled input for receiving the gate drive of the secondary switch, may use primary side, secondary-side, or primary and secondary side signals to generate the sample acquisition control pulse and clamp switch drive signal. The sample acquisition control pulse occurs when the secondary current reaches its minimum or zero.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: July 14, 2015
    Assignee: Picor Corporation
    Inventors: John P. Clarkin, Patrizio Vinciarelli, Jeffrey Bruce Van Auken
  • Patent number: 8299767
    Abstract: In some implementations, a method of dynamically maintaining a device's operation within a safe operating area (SOA) may include sensing instantaneous voltage and current of the device; determining, based on the sensed instantaneous voltage and current, a value that represents a power dissipated in the device; using the determined dissipated power and a model of thermal behavior of the device to model a junction temperature of the device; and controlling operation of the device based on the modeled junction temperature. A programmable SOA circuit including sensing, scaling, filtering, and controlling functions may be packaged on a single die or in a package with a power transistor.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: October 30, 2012
    Assignee: Picor Corporation
    Inventors: Claudio Tuozzolo, Aiman Alhoussami, John P. Clarkin, Robert M. Lanoue, Andreas Gerasimos Ladas
  • Patent number: 7859859
    Abstract: A primary-side sampled feedback system includes a sample acquisition phase during which the voltage across the clamp capacitor is sensed as a measure of the primary-reflect output voltage. One end of the clamp capacitor is ground-referenced during the sample acquisition phase. The sample circuitry, which may include a transformer-coupled input for receiving the gate drive of the secondary switch, may use secondary-side or primary and secondary side signals to generate the sample acquisition control pulse and clamp switch drive signal. The sample acquisition control pulse occurs when the secondary current reaches its minimum or zero.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: December 28, 2010
    Assignee: Picor Corporation
    Inventor: John P. Clarkin
  • Publication number: 20080117656
    Abstract: A primary-side sampled feedback system includes a sample acquisition phase during which the voltage across the clamp capacitor is sensed as a measure of the primary-reflect output voltage. One end of the clamp capacitor is ground-referenced during the sample acquisition phase. The sample circuitry, which may include a transformer-coupled input for receiving the gate drive of the secondary switch, may use secondary-side or primary and secondary side signals to generate the sample acquisition control pulse and clamp switch drive signal. The sample acquisition control pulse occurs when the secondary current reaches its minimum or zero.
    Type: Application
    Filed: November 20, 2006
    Publication date: May 22, 2008
    Inventor: John P. Clarkin
  • Patent number: 7368957
    Abstract: High-performance low-power isolated bootstrapped gate drive apparatus and methods are disclosed for driving high-side and floating transistors. The gate drivers use edge-triggered capacitive-coupled inputs. The gate drivers may include detection and delay circuitry to facilitate zero-voltage-switching of the high side or floating transistor and providing more robust rejection of false triggering. A capacitively coupled differential input edge triggered gate driver provides exceptional immunity to false triggering. The gate drivers may be used in transformer coupled drive circuits using transformers that need only support coupled pulses wide enough to be recognized as an edge by the input circuit.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: May 6, 2008
    Assignee: Picor Corporation
    Inventors: John P. Clarkin, Alex Gusinov, Claudio Tuozzolo, Patrizio Vinciarelli
  • Publication number: 20080018364
    Abstract: High-performance low-power isolated bootstrapped gate drive apparatus and methods are disclosed for driving high-side and floating transistors. The gate drivers use edge-triggered capacitive-coupled inputs. The gate drivers may include detection and delay circuitry to facilitate zero-voltage-switching of the high side or floating transistor and providing more robust rejection of false triggering. A capacitively coupled differential input edge triggered gate driver provides exceptional immunity to false triggering. The gate drivers may be used in transformer coupled drive circuits using transformers that need only support coupled pulses wide enough to be recognized as an edge by the input circuit.
    Type: Application
    Filed: July 21, 2006
    Publication date: January 24, 2008
    Inventors: John P. Clarkin, Alex Gusinov, Claudio Tuozzolo, Patrizio Vinciarelli