Patents by Inventor John P. Scalia

John P. Scalia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040219663
    Abstract: A method of fabricating an array of biopolymer probes bound to a surface of a substrate at feature locations. The method uses multiple deposition heads each with a set of nozzles through which drops are dispensed. Drops are deposited during a same cycle onto the feature location from a set of the deposition heads while spaced from the surface. At least some of those drops contain probe precursors, so that the probe precursors bind to the surface through a linker. This depositing is repeated multiple times with the probe precursor deposited in a prior cycle serving as the linker for a probe precursor deposited in a subsequent cycle. Additionally, drops are deposited at a same feature from the set of heads during a one cycle, and further drops are deposited at the same feature from the set of heads during another cycle. Apparatus and computer program products are also provided.
    Type: Application
    Filed: April 30, 2003
    Publication date: November 4, 2004
    Inventors: Robert D. Page, Eric M. Leproust, John P. Scalia
  • Patent number: 5248656
    Abstract: A method for producing superconductor wire characterized by forming a solid superconductor preform, suspending the preform within an oven such that a portion of it is heated to approximately its melting point, and drawing on the melted portion of the preform to form a superconductor wire. If the preform is solid, so is the drawn wire, and if the preform is hollow, the drawn wire becomes a capillary. Superconductor wires can be intertwined, or can be intertwined with ordinary conductive wires or non-conductive tubing to form superconductor cables. A superconductor transmission line is made by coating a copper tube with subsequent superconductor, insulating, and protective layers.
    Type: Grant
    Filed: October 9, 1990
    Date of Patent: September 28, 1993
    Assignee: Hewlett-Packard Company
    Inventors: V. K. Nagesh, John P. Scalia
  • Patent number: 5221421
    Abstract: A specialized etching method for producing fine-geometry gold circuit structures. Production thereof is accomplished by maintaining a constant gold etching rate. Metal etching normally slows as the amount of dissolved gold (a reaction product of the etching process) increases. To remove the dissolved gold, one method involves cooling the etchant to precipitate a gold complex therefrom. The remaining, recovered etchant is then heated and made available for continued etching. Another method involves a cathode/anode assembly which is immersed in the etchant. Activation of the assembly recovers metallic gold and regenerates the etchant. These methods, when used continuously or periodically in a dip or spray etching system, maintain a constant etching rate. As a result, fine-geometry circuit structures may be accurately produced while minimizing material costs (e.g. etchant use) and minimizing the production of undesirable waste products and disposal expenses associated therewith.
    Type: Grant
    Filed: March 25, 1992
    Date of Patent: June 22, 1993
    Assignee: Hewlett-Packard Company
    Inventors: Jacques Leibovitz, Daniel J. Miller, Maria L. Cobarruviaz, John P. Scalia, Howard H. Nakano, Voddarahalli K. Nagesh, Clinton C. Chao