Abstract: The linearity of a transistor amplifier comprising a plurality of transistors operating parallel is improved by reducing the odd order transconductance derivatives of signals generated by the transistors. The transistors can be provided in groups with each group having a different bias voltage applied thereto or each group of transistors can have a different input signal applied thereto. The groups of transistors can have different physical parameters such as the width to length ratio of gates in field effect transistors and threshold voltages for the transistors.

Abstract: Disclosed are a multi-chip power amplifier comprising a plurality chips with each chip being a transistor amplifier, and a housing in which all of the semiconductor chips are mounted. A plurality of input leads extend into the housing and a plurality of output leads extend from the housing. A plurality of first matching networks couple a semiconductor chip to an input lead and a plurality of second matching networks couple each semiconductor chip to an output lead whereby each chip has its own input lead and output lead. By providing all amplifier chips within a single housing with matching networks within the housing coupling the chips to the input and output leads, manufacturing cost is reduced and the overall package footprint on a mounting substrate is reduced. Further, the close proximity of the chips within the housing reduces phase differences among signals in the semiconductor chips.

Abstract: Disclosed are a multi-chip power amplifier comprising a plurality chips with each chip being a transistor amplifier, and a housing in which all of the semiconductor chips are mounted. A plurality of input leads extend into the housing and a plurality of output leads extend from the housing. A plurality of first matching networks couple a semiconductor chip to an input lead and a plurality of second matching networks couple each semiconductor chip to an output lead whereby each chip has its own input lead and output lead. By providing all amplifier chips within a single housing with matching networks within the housing coupling the chips to the input and output leads, manufacturing cost is reduced and the overall package footprint on a mounting substrate is reduced. Further, the close proximity of the chips within the housing reduces phase differences among signals in the semiconductor chips.

Abstract: The linearity of a transistor amplifier comprising a plurality of transistors operating parallel is improved by reducing the odd order transconductance derivatives of signals generated by the transistors. The transistors can be provided in groups with each group having a different bias voltage applied thereto or each group of transistors can have a different input signal applied thereto. The groups of transistors can have different physical parameters such as the width to length ratio of gates in field effect transistors and threshold voltages for the transistors.