Patents by Inventor John R. Wehrmacher

John R. Wehrmacher has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5134314
    Abstract: A method and circuitry allows for the prevention of tester induced failures and reliability problems which occur when a tester creates bus contention by overdriving output pins of an integrated circuit. For each input/output (I/O) pad which is used for the output of data, a first signal on an output data line is compared with a second signal which is currently on the I/O pad. When the output is enabled and the comparison indicates the first signal is not equal to the second signal, the I/O pad is isolated from the output data line. The I/O pad is isolated, and thus in shutdown mode, until the I/O pad is no longer being driven to a signal value which is different than the signal value of the first signal on the output data line. Further, each I/O pad may be electrically isolated from its output data line whenever a comparison for any I/O pad indicates that the signal for the I/O pad is not equal to the signal on its output data line.
    Type: Grant
    Filed: December 18, 1990
    Date of Patent: July 28, 1992
    Assignee: VLSI Technology, Inc.
    Inventor: John R. Wehrmacher