Patents by Inventor John Redford
John Redford has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20150312758Abstract: A method for providing a communication device with credentials to enable it to access communication resources provided by a network operator, the method comprising storing, on the communication device, an indication of (i) an identity associated with the communication device; and (ii) an identity associated with a provisioning agent, transmitting, from the communication device to a communication network, a registration request that identifies the communication device and the provisioning agent, the provisioning agent providing, in response to the registration request, credentials to enable the communication device to access communication resources provided by a network operator and transmitting said credentials from the communication network to the communication device.Type: ApplicationFiled: April 23, 2015Publication date: October 29, 2015Inventor: John Redford
-
Publication number: 20150309797Abstract: A processor including a register file having a plurality of registers, and configured for out-of-order instruction execution, further includes a renamer unit that produces generation numbers that are associated with register file addresses to provide a renamed version of a register that is temporally offset from an existing version of that register rather than assigning a non-programmer-visible physical register as the renamed register. The processor includes a small reset DHL Gshare branch prediction unit coupled to an instruction cache and configured to provide speculative addresses to the instruction cache.Type: ApplicationFiled: October 31, 2014Publication date: October 29, 2015Inventors: Sophie WILSON, John REDFORD, Geoffrey BARRETT, Tariq KURD
-
Publication number: 20150309798Abstract: An apparatus including a queue configured to store a plurality of instructions and state information indicating whether each instruction of the plurality of instructions can be performed independently of older pending instructions; and a state-selection circuit configured to set a state information of each instruction of the plurality of instructions ifs view of an older pending instruction in the queue.Type: ApplicationFiled: October 31, 2014Publication date: October 29, 2015Applicant: BROADCOM CORPORATIONInventors: Tariq KURD, John REDFORD
-
Patent number: 8640116Abstract: A loader module for loading program code into a memory is described, whereby the memory may be partially defective, with non-defective parts of the memory being indicated by diagnostic information. The loader module is adapted for loading program code, in accordance with the diagnostic information, into non-defective parts of the memory, and for relinking the program code in accordance with the memory locations it has been loaded to. Furthermore, a method for loading program code into a memory is described. The method comprises the following steps which may be carried out in arbitrary order: loading program code, in accordance with diagnostic information, into non-defective parts of the memory, and relinking the program code in accordance with the memory locations it has been loaded to.Type: GrantFiled: July 22, 2004Date of Patent: January 28, 2014Assignee: Broadcom CorporationInventor: John Redford
-
Patent number: 8326682Abstract: Subscriber travel behavior is defined using cellular call location data. The defined travel behavior is used to segment the customer population. In a further aspect of the disclosed principles, a method to consolidate numerous of price plans is disclosed wherein price plans are grouped using cluster analysis. In the context of this disclosure, the term “cluster analysis” encompasses a number of different algorithms and methods for grouping objects of similar kind into respective categories to thus organize observed data into meaningful structures. In this context, cluster analysis is a data analysis process for sorting different objects into groups in a way that the degree of association between two objects is maximal if they belong to the same group and minimal otherwise.Type: GrantFiled: December 31, 2007Date of Patent: December 4, 2012Assignee: United States Cellular CorporationInventors: John Redford, Claudio Taglienti, Michael Irizarry, Narothum Saxena
-
Publication number: 20090171717Abstract: Subscriber travel behavior is defined using cellular call location data. The defined travel behavior is used to segment the customer population. In a further aspect of the disclosed principles, a method to consolidate numerous of price plans is disclosed wherein price plans are grouped using cluster analysis. In the context of this disclosure, the term “cluster analysis” encompasses a number of different algorithms and methods for grouping objects of similar kind into respective categories to thus organize observed data into meaningful structures. In this context, cluster analysis is a data analysis process for sorting different objects into groups in a way that the degree of association between two objects is maximal if they belong to the same group and minimal otherwise.Type: ApplicationFiled: December 31, 2007Publication date: July 2, 2009Applicant: United States Cellular CorporationInventors: John Redford, Claudio Taglienti, Michael Irizarry, Narothum Saxena
-
Patent number: 7415654Abstract: A tester unit for evaluating data integrity of a block of data is described. The tester unit comprises a checksum determination facility adapted for deriving a checksum value from a block of data stored in a memory, and a checksum evaluation facility adapted for comparing the derived checksum value with a predetermined checksum value, and for initiating a reload of the block in case the derived checksum value differs from the predetermined checksum value.Type: GrantFiled: August 30, 2004Date of Patent: August 19, 2008Assignee: Broadcom CorporationInventor: John Redford
-
Patent number: 7375662Abstract: A method of decompressing data words of an instruction set includes: A. filling a primary dictionary with at least one primary data word of the instruction set, each of the at least one primary data word being stored in the primary dictionary in a location associated with a distinct primary dictionary index; B. filling at least one secondary dictionary with at least one difference bit stream, each of the at least one difference bit stream being stored in one of the at least one secondary dictionary in a location associated with a distinct secondary dictionary index; C. receiving a code word, the code word comprising: a. a header which identifies the primary dictionary and a specific one of the at least one secondary dictionary; b. a first bit stream; and c. a second bit stream; wherein the first bit stream comprises the distinct primary dictionary index and the second bit stream comprises the distinct secondary dictionary index; D.Type: GrantFiled: December 2, 2003Date of Patent: May 20, 2008Assignee: Broadcom CorporationInventors: Sophie Wilson, John Redford
-
Publication number: 20050289436Abstract: A tester unit for evaluating data integrity of a block of data is described. The tester unit comprises a checksum determination facility adapted for deriving a checksum value from a block of data stored in a memory, and a checksum evaluation facility adapted for comparing the derived checksum value with a predetermined checksum value, and for initiating a reload of the block in case the derived checksum value differs from the predetermined checksum value.Type: ApplicationFiled: August 30, 2004Publication date: December 29, 2005Applicant: Broadcom CorporationInventor: John Redford
-
Publication number: 20050273577Abstract: The present invention relates to the field of (micro)computer design and architecture, and in particular to microarchitecture associated with moving data values between a (micro)processor and memory components. Particularly, the present invention relates to a computer system with an processor architecture in which register addresses are generated with more than one execution channel controlled by one central processing unit with at least one load/store unit for loading and storing data objects, and at least one cache memory associated to the processor holding data objects accessed by the processor, wherein said processor's load/store unit contains a high speed memory directly interfacing said load/store unit to the cache. The present invention improves the of architectures with dual ported microprocessor implementations comprising two execution pipelines capable of two load/store data transactions per cycle.Type: ApplicationFiled: June 2, 2004Publication date: December 8, 2005Applicant: Broadcom CorporationInventors: Sophie Wilson, John Redford
-
Publication number: 20050253858Abstract: In a prefetch buffering system and method, a pool of prefetch buffers are organized in such a manner that there is a tight connection between the buffer pool and the data streams of interest. In this manner, efficient prefetching of data from memory is achieved and the amount of required buffer space is reduced. A memory control system controls the reading of data from a memory. A plurality of buffers buffer data read from the memory. A buffer assignment unit assigns a plurality of data streams to the plurality of buffers. The buffer assignment unit assigns to each data stream a primary buffer and a secondary buffer of the plurality of buffers, such that upon receiving a data request from a first data stream, the primary buffer assigned to the first data stream contains fetch data of the data request and the secondary buffer assigned to the first data stream contains prefetch data of the data request.Type: ApplicationFiled: May 14, 2004Publication date: November 17, 2005Inventors: Takahide Ohkami, John Redford
-
Publication number: 20050193384Abstract: A loader module for loading program code into a memory is described, whereby the memory may be partially defective, with non-defective parts of the memory being indicated by diagnostic information. The loader module is adapted for loading program code, in accordance with the diagnostic information, into non-defective parts of the memory, and for relinking the program code in accordance with the memory locations it has been loaded to. Furthermore, a method for loading program code into a memory is described. The method comprises the following steps which may be carried out in arbitrary order: loading program code, in accordance with diagnostic information, into non-defective parts of the memory, and relinking the program code in accordance with the memory locations it has been loaded to.Type: ApplicationFiled: July 22, 2004Publication date: September 1, 2005Applicant: Broadcom CorporationInventor: John Redford
-
Patent number: 6931518Abstract: A method of determining whether datapaths executing in a computer program should execute conditional processing block includes determining whether processor enable (PE) states of all of the datapaths are disabled, and branching around the conditional processing if the PE states of all of the datapaths are disabled. Branching is not performed, even if the PE states of all of the datapaths are disabled, if the program is determined to be deterministic. That determination is made by evaluating the state of a deterministic bit. Instructions are also provided for carrying out the determining and branching operations. The instructions may also be combined with operations that maintain the PE states during conditional processing.Type: GrantFiled: November 28, 2000Date of Patent: August 16, 2005Assignee: ChipWrights Design, Inc.Inventor: John Redford
-
Patent number: 6857394Abstract: An article for a domestic bird is provided with a perch rod surrounded by protective base, window wall, and side walls for mounting inwardly of a window of a building. A domestic bird free-flying in the building, or a clipped bird climbing a ladder or braided rope, can alight on the perch rod in the article and enjoy the light of the window while being prevented from pecking and damaging the wood and other structure of the window. The window wall and side walls of the article extend well above or beyond the perch rod a distance greater than the maximum reach of the bird's beak while the bird is standing on the perch rod. A portion of the article also comprises a base below the perch rod, for catching droppings and spatters of the bird. The article is mounted to the window glass by suction cups, and can be further supported by cushions on the base of the article which engage a horizontal surface of the window structure, as a sill of the window structure or the top of a lower sash.Type: GrantFiled: March 14, 2003Date of Patent: February 22, 2005Inventor: John Redford
-
Publication number: 20040170279Abstract: A method of decompressing data words of an instruction set includes:Type: ApplicationFiled: December 2, 2003Publication date: September 2, 2004Applicant: Broadcom CorporationInventors: Sophie Wilson, John Redford
-
Publication number: 20040158691Abstract: A method of controlling the enabling of processor datapaths in a SIMD processor during a loop processing operation is described. The information used by the method includes an allocation between the data items and a memory, a size of the array, and a number of remaining parallel passes of the datapaths in the loop processing operation. A computer instruction is also provided, which includes a loop handling instruction that specifies the enabling of one of a plurality of processor datapaths during processing an array of data items. The instruction includes a count field that specifies the number of remaining parallel loop passes to process the array and a count field that specifies the number of serial loop passes to process the array. Different instructions can be used to handle different allocations of passes to parallel datapaths. The instruction also uses information about the total number of datapaths.Type: ApplicationFiled: February 3, 2004Publication date: August 12, 2004Applicant: ChipWrights Design, Inc., a Massachusetts corporationInventor: John Redford
-
Patent number: 6732253Abstract: A method of controlling the enabling of processor datapaths in a SIMD processor during a loop processing operation is described. The information used by the method includes an allocation between the data items and a memory, a size of the array, and a number of remaining parallel passes of the datapaths in the loop processing operation. A computer instruction is also provided, which includes a loop handling instruction that specifies the enabling of one of a plurality of processor datapaths during processing an array of data items. The instruction includes a count field that specifies the number of remaining parallel loop passes to process the array and a count field that specifies the number of serial loop passes to process the array. Different instructions can be used to handle different allocations of passes to parallel datapaths. The instruction also uses information about the total number of datapaths.Type: GrantFiled: November 13, 2000Date of Patent: May 4, 2004Assignee: ChipWrights Design, Inc.Inventor: John Redford
-
Patent number: 6720894Abstract: A method of decompressing data words of an instruction set includes: A. filling a primary dictionary with at least one primary data word of the instruction set, each of the at least one primary data word being stored in the primary dictionary in a location associated with a distinct primary dictionary index; B. filling at least one secondary dictionary with at least one difference bit stream, each of the at least one difference bit stream being stored in one of the at least one secondary dictionary in a location associated with a distinct secondary dictionary index; C. receiving a code word, the code word comprising: a. a header which identifies the primary dictionary and a specific one of the at least one secondary dictionary; b. a first bit stream; and c. a second bit stream; wherein the first bit stream comprises the distinct primary dictionary index and the second bit stream comprises the distinct secondary dictionary index; D.Type: GrantFiled: September 3, 2002Date of Patent: April 13, 2004Assignee: Broadcom CorporationInventors: Sophie Wilson, John Redford
-
Publication number: 20030221632Abstract: An article for a domestic bird is provided with a perch rod surrounded by protective base, window wall, and side walls for mounting inwardly of a window of a building. A domestic bird free-flying in the building, or a clipped bird climbing a ladder or braided rope, can alight on the perch rod in the article and enjoy the light of the window while being prevented from pecking and damaging the wood and other structure of the window. The window wall and side walls of the article extend well above or beyond the perch rod a distance greater than the maximum reach of the bird's beak while the bird is standing on the perch rod. A portion of the article also comprises a base below the perch rod, for catching droppings and spatters of the bird. The article is mounted to the window glass by suction cups, and can be further supported by cushions on the base of the article which engage a horizontal surface of the window structure, as a sill of the window structure or the top of a lower sash.Type: ApplicationFiled: March 14, 2003Publication date: December 4, 2003Inventor: John Redford
-
Publication number: 20030222804Abstract: A method of decompressing data words of an instruction set includes:Type: ApplicationFiled: September 3, 2002Publication date: December 4, 2003Applicant: Broadcom CorporationInventors: Sophie Wilson, John Redford