Patents by Inventor John Shigeto Minami
John Shigeto Minami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9098297Abstract: An apparatus and method are provided including a hardware accelerator capable of being interfaced with a processor for accelerating the execution of an application written utilizing an object-oriented programming language. Such object-oriented programming language may include Java and/or C++.Type: GrantFiled: June 14, 2005Date of Patent: August 4, 2015Assignee: NVIDIA CorporationInventors: Thomas C. Poff, John Shigeto Minami, Ryo Koyama
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Patent number: 8549170Abstract: A system and method are provided for performing the retransmission of data in a network. Included is an offload engine in communication with system memory and a network. The offload engine serves for managing the retransmission of data transmitted in the network.Type: GrantFiled: December 19, 2003Date of Patent: October 1, 2013Assignee: NVIDIA CorporationInventors: John Shigeto Minami, Michael Ward Johnson, Andrew Currid, Mrudula Kanuri
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Patent number: 8218555Abstract: A gigabit Ethernet adapter provides a provides a low-cost, low-power, easily manufacturable, small form-factor network access module which has a low memory demand and provides a highly efficient protocol decode. The invention comprises a hardware-integrated system that both decodes multiple network protocols in a byte-streaming manner concurrently and processes packet data in one pass, thereby reducing system memory and form factor requirements, while also eliminating software CPU overhead. A preferred embodiment of the invention comprises a plurality of protocol state machines that decode network protocols such as TCP, IP, User Datagram Protocol (UDP), PPP, Raw Socket, RARP, ICMP, IGMP, iSCSI, RDMA, and FCIP concurrently as each byte is received. Each protocol handler parses, interprets, and strips header information immediately from the packet, requiring no intermediate memory. The invention provides an Internet tuner core, peripherals, and external interfaces.Type: GrantFiled: April 23, 2002Date of Patent: July 10, 2012Assignee: NVIDIA CorporationInventors: John Shigeto Minami, Robin Yasu Uyeshiro, Michael Ward Johnson, Steve Su
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Patent number: 8176545Abstract: A system and method are provided for validating a security service associated with packets communicated on a network. A hash of a security service associated with packets communicated on a network is generated. In use, the security service associated with the packets is validated utilizing the hash.Type: GrantFiled: December 19, 2003Date of Patent: May 8, 2012Assignee: NVIDIA CorporationInventors: Daniel Leo Greenfield, John Shigeto Minami, Robin Yasu Uyeshiro
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Patent number: 8073002Abstract: An offload system, method, and computer program product are provided. Based on an identified data structure, it is determined whether a hardware network interface is operating in a first mode or a second mode. The hardware network interface is coupled between a network and a processor. If it is determined that the hardware network interface is operating in the first mode, the packets are processed utilizing the processor. If it is determined that the hardware network interface is operating in the second mode, the packets are processed utilizing the hardware network interface.Type: GrantFiled: October 10, 2006Date of Patent: December 6, 2011Assignee: NVIDIA CorporationInventors: John Shigeto Minami, Michael Ward Johnson
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Patent number: 8065439Abstract: A system, method, and related data structure are provided for transmitting data in a network. Included is a data object (i.e. metadata) for communicating between a first network protocol layer and a second network protocol layer. In use, the data object facilitates network communication management utilizing a transport offload engine.Type: GrantFiled: December 19, 2003Date of Patent: November 22, 2011Assignee: NVIDIA CorporationInventors: Michael Ward Johnson, Andrew Currid, Mrudula Kanuri, John Shigeto Minami
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Patent number: 8059680Abstract: An offload system, method, and computer program product are provided for handling transport layer processing of a connection between a local host and a remote host via at least one network. A network interface associated with the local host is utilized for such purpose. A plurality of ports allow communication between the local host and the at least one network. The communications corresponding with the connection are monitored and the connection is associated with at least one port. At least one of the ports receiving the communications corresponding with the connection are identified.Type: GrantFiled: October 10, 2006Date of Patent: November 15, 2011Assignee: NVIDIA CorporationInventors: John Shigeto Minami, Michael Ward Johnson
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Patent number: 7996568Abstract: An offload system, method, and computer program product are provided. Included is a host with a processor and memory for receiving data from a network. In addition, a network interface is utilized for transferring the data to the memory via direct memory access (DMA).Type: GrantFiled: October 10, 2006Date of Patent: August 9, 2011Assignee: NVIDIA CorporationInventors: Michael Ward Johnson, John Shigeto Minami, Ryo Koyama
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Patent number: 7979526Abstract: A system and method are provided for establishing network connections. Initially, an attempt to establish a connection on a network is identified. A portion of memory is then allocated for storing data associated with the connection.Type: GrantFiled: December 29, 2009Date of Patent: July 12, 2011Assignee: NVIDIA CorporationInventors: John Shigeto Minami, Michael Ward Johnson, Robin Yasu Uyeshiro
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Patent number: 7957379Abstract: A system and method are provided for processing packets received via a network. In use, data packets and control packets are received via a network. Further, the data packets are processed in parallel with the control packets.Type: GrantFiled: October 19, 2004Date of Patent: June 7, 2011Assignee: NVIDIA CorporationInventors: John Shigeto Minami, Robia Y. Uyeshiro, Thien E. Ooi, Michael Ward Johnson, Mrudula Kanuri
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Patent number: 7899913Abstract: A system and method are provided for establishing network connections. Initially, an attempt to establish a connection on a network is identified. A portion of memory is then allocated for storing data associated with the connection.Type: GrantFiled: December 19, 2003Date of Patent: March 1, 2011Assignee: NVIDIA CorporationInventors: John Shigeto Minami, Michael Ward Johnson, Robin Yasu Uyeshiro
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Publication number: 20100106840Abstract: A system and method are provided for establishing network connections. Initially, an attempt to establish a connection on a network is identified. A portion of memory is then allocated for storing data associated with the connection.Type: ApplicationFiled: December 29, 2009Publication date: April 29, 2010Inventors: John Shigeto Minami, Michael Ward Johnson, Robin Yasu Uyeshiro
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Patent number: 7646790Abstract: A communication processor of a class, such as an Internet tuner, provides such desirable features (FIG. 2) as LAN support, an SPI interface (128), a dedicated port (56), and ADPCM (22) for audio applications. The invention provides a low-cost, low-power, easily manufactured, small form-actor network access module which has a low memory demand and provides a highly efficient protocol decode. The invention comprises a hardware-integrated system that both decodes multiple network protocols in a streaming manner concurrently and processes packet data in one pass, thereby reducing system memory and form factor requirements, while also eliminating software CPU overhead.Type: GrantFiled: October 31, 2007Date of Patent: January 12, 2010Assignee: NVIDIA CorporationInventors: John Shigeto Minami, Michael Ward Johnson
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Patent number: 7624198Abstract: A system and method are provided for communicating data in a network utilizing a transport offload engine. Included is a data list object that describes how data communicated in a network is to be stored (i.e. placed, etc.) in memory (i.e. application memory). Stored in association (i.e. located, kept together, etc.) with the data list object is a sequence object. Such sequence object identifies a sequence space associated with the data to be stored using the data list object. To this end, the sequence object is used by a transport offload engine to determine whether or not incoming data is to be stored using the data list object.Type: GrantFiled: December 19, 2003Date of Patent: November 24, 2009Assignee: NVIDIA CorporationInventors: Michael Ward Johnson, Andrew Currid, Mrudula Kanuri, John Shigeto Minami
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Patent number: 7535913Abstract: The invention is embodied in a gigabit Ethernet adapter. A system according to the invention provides a compact hardware solution to handling high network communication speeds. In addition, the invention adapts to multiple communication protocols via a modular construction and design.Type: GrantFiled: June 5, 2003Date of Patent: May 19, 2009Assignee: NVIDIA CorporationInventors: John Shigeto Minami, Robin Yasu Uyeshiro, Michael Ward Johnson, Steve Su, Michael John Sebastian Smith, Addison Kwuanming Chen, Mihir Shaileshbhai Doctor, Daniel Leo Greenfield
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Patent number: 7483375Abstract: An Internet network protocol stack, along with special logic, is embedded with a modem, thereby enabling a modem to become Internet-ready. As a result, the modem offloads much of the network protocol processing from the main CPU and improves the overall performance of the communication system.Type: GrantFiled: May 20, 2004Date of Patent: January 27, 2009Assignee: NVIDIA CorporationInventors: Michael Ward Johnson, John Shigeto Minami, Ryo Koyama
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Patent number: 7379475Abstract: A communication processor of a class, such as an Internet tuner, provides such desirable features (FIG. 2) as LAN support, an SPI interface (128), a dedicated port (56), and ADPCM (22) for audio applications. The invention provides a low-cost, low-power, easily manufactured, small form-factor network access module which has a low memory demand and provides a highly efficient protocol decode. The invention comprises a hardware-integrated system that both decodes multiple network protocols in a streaming manner concurrently and processes packet data in one pass, thereby reducing system memory and form factor requirements, while also eliminating software CPU overhead.Type: GrantFiled: January 25, 2002Date of Patent: May 27, 2008Assignee: NVIDIA CorporationInventors: John Shigeto Minami, Michael Ward Johnson
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Patent number: 7260631Abstract: An Internet small computer system interface (iSCSI) system, method and associated data structure are provided for receiving data in protocol data units. After a protocol data unit is received, a data list is identified that describes how the data contained in the protocol data unit is to be stored (i.e. placed, saved, etc.) in memory (i.e. application memory). Further stored is a state of the data list. To this end, the state of the data list is used in conjunction with the storage of data from a subsequent protocol data unit.Type: GrantFiled: December 19, 2003Date of Patent: August 21, 2007Assignee: NVIDIA CorporationInventors: Michael Ward Johnson, Andrew Currid, Mrudula Kanuri, John Shigeto Minami
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Patent number: 6983357Abstract: A method and apparatus for accelerating an object-oriented programming language are provided at a hardware gate level. In a Java-compliant embodiment, a Java Application framework is implemented in hardware. The Java.AWT, Java.NET. and Java.IO application frameworks are supported in the preferred embodiment of the invention. Instances and methods of supported application framework classes that are executed by a Java program are offloaded to a hardware object management system. A software stub is provided as an interface between the hardware object management system and the central processing unit.Type: GrantFiled: June 20, 2001Date of Patent: January 3, 2006Assignee: NVIDIA CorporationInventors: Thomas C. Poff, John Shigeto Minami, Ryo Koyama
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Patent number: RE39501Abstract: A multiple network protocol encoder/decoder comprising a network protocol layer, data handler, O.S. State machine, and memory manager state machines implemented at a hardware gate level. Network packets are received from a physical transport level mechanism by the network protocol layer state machine which decodes network protocols such as TCP, IP, User Datagram Protocol (UDP), PPP, and Raw Socket concurrently as each byte is received. Each protocol handler parses and strips header information immediately from the packet, requiring no intermediate memory. The resulting data are passed to the data handler which consists of data state machines that decode data formats such as email, graphics, Hypertext Transfer Protocol (HTTP), Java, and Hypertext Markup Language (HTML).Type: GrantFiled: March 6, 2002Date of Patent: March 6, 2007Assignee: NVIDIA CorporationInventors: John Shigeto Minami, Ryo Koyama, Michael Ward Johnson, Masaru Shinohara, Thomas C. Poff, Daniel F. Burkes