Patents by Inventor John Stephen Drewery

John Stephen Drewery has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7560016
    Abstract: To make a metal feature, a non-plateable layer is applied to a workpiece surface and then patterned to form a first plating region and a first non-plating region. Then, metal is deposited on the workpiece to form a raised field region in said first plating region and a recessed region in said first non-plating region. Then, an accelerator film is applied globally on the workpiece. A portion of the accelerator film is selectively removed from the field region, and another portion of the accelerator film remains in the recessed acceleration region. Then, metal is deposited onto the workpiece, and the metal deposits at an accelerated rate in the acceleration region, resulting in a greater thickness of metal in the acceleration region compared to metal in the non-activated field region. Then, metal is completely removed from the field region, thereby forming the metal feature.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: July 14, 2009
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, John Stephen Drewery
  • Patent number: 7449099
    Abstract: To make a metal feature, a non-plateable layer is applied to a workpiece surface and then patterned to form a first plating region and a first non-plating region. Then, metal is deposited on the workpiece to form a raised field region in said first plating region and a recessed region in said first non-plating region. Then, an accelerator film is applied globally on the workpiece. A portion of the accelerator film is selectively removed from the field region, and another portion of the accelerator film remains in the recessed acceleration region. Then, metal is deposited onto the workpiece, and the metal deposits at an accelerated rate in the acceleration region, resulting in a greater thickness of metal in the acceleration region compared to metal in the non-activated field region. Then, metal is completely removed from the field region, thereby forming the metal feature.
    Type: Grant
    Filed: September 21, 2004
    Date of Patent: November 11, 2008
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, John Stephen Drewery
  • Patent number: 7405163
    Abstract: An accelerator solution is globally applied to a workpiece to form an accelerator film, and then a portion of the accelerator film is selectively removed from the workpiece to form an acceleration region having a higher concentration of accelerator. The higher concentration of accelerator causes metal to deposit at a faster rate in the acceleration region than in a non-accelerated region for the duration of metal deposition. To make a metal feature, a resist layer is applied to a workpiece surface and patterned to form a recessed region and a field region. Then, a metal seed layer is deposited on the workpiece surface. An accelerator solution is applied so that an accelerator film forms on the metal seed layer. A portion of the accelerator film is selectively removed from the field region, leaving another portion of the accelerator film in the recessed region.
    Type: Grant
    Filed: April 13, 2004
    Date of Patent: July 29, 2008
    Assignee: Novellus Systems, Inc.
    Inventors: John Stephen Drewery, Steven T. Mayer
  • Patent number: 7041596
    Abstract: An excited surfactant species is created by generating plasma discharge in a surfactant precursor gas. A surfactant species typically includes at least one of iodine, led, thin, gallium, and indium. A surface of an integrated circuit substrate is exposed to the excited surfactant species to form a plasma-treated surface. A ruthenium thin film is deposited on the plasma-treated surface using a CVD technique.
    Type: Grant
    Filed: April 8, 2004
    Date of Patent: May 9, 2006
    Assignee: Novellus Systems, Inc.
    Inventors: Jeremie James Dalton, Sanjay Gopinath, Jason M. Blackburn, John Stephen Drewery
  • Patent number: 6743661
    Abstract: An apparatus and method for flexibly bonding an integrated circuit package to a printed circuit board are provided. The apparatus includes a semiconductor having first and second sides, where the first side defines an inner region and peripheral region. The inner region is surrounded by the peripheral region. An interposer having a substantially similar coefficient of thermal expansion to the semiconductor is included. A dielectric region surrounding the interposer is included. The dielectric region is configured to be partially elastic. A plurality of posts extends transversely through the dielectric region. The post have first and second ends where the first end is configured to be attached to the peripheral region of the semiconductor chip. The second ends of the posts are configured to be attached to an external assembly, wherein the posts are able to absorb stress due to a thermal expansion mismatch between the external assembly and the interposer.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: June 1, 2004
    Assignee: Novellus Systems, Inc.
    Inventor: John Stephen Drewery
  • Patent number: 6719886
    Abstract: Ionized Physical Vapor Deposition (IPVD) is provided by a method of apparatus (500) particularly useful for sputtering conductive metal coating material from an annular magnetron sputtering target (10). The sputtered material is ionized in a processing space between the target (10) and a substrate (100) by generating a dense plasma in the space with energy coupled from a coil (39) located outside of the vacuum chamber (501) behind a dielectric window (33) in the chamber wall (502) at the center of the opening (421) in the sputtering target. A Faraday type shield (26) physically shields the window to prevent coating material from coating the window, while allowing the inductive coupling of energy from the coil into the processing space.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: April 13, 2004
    Assignee: Tokyo Electron Limited
    Inventors: John Stephen Drewery, Glyn Reynolds, Derrek Andrew Russell, Jozef Brcka, Mirko Vukovic, Michael James Grapperhaus, Frank Michael Cerio, Jr., Bruce David Gittleman
  • Patent number: 6699396
    Abstract: A method for forming conductive features in dielectric materials is disclosed which includes providing a dielectric layer and forming a release layer over the dielectric layer. Then a feature is defined into the each of the release layer and the dielectric layer and a conductive material is filled over the release layer and into the feature. The release layer is then removed where the removing serves to remove the conductive material from over the dielectric layer previously covered by the release layer.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: March 2, 2004
    Assignee: Novellus Systems, Inc.
    Inventor: John Stephen Drewery
  • Patent number: 6525407
    Abstract: An apparatus and method for flexibly bonding an integrated circuit package to a printed circuit board are provided. The apparatus includes a semiconductor having first and second sides, where the first side defines an inner region and peripheral region. The inner region is surrounded by the peripheral region. An interposer having a substantially similar coefficient of thermal expansion to the semiconductor is included. A dielectric region surrounding the interposer is included. The dielectric region is configured to be partially elastic. A plurality of posts extends transversely through the dielectric region. The post have first and second ends where the first end is configured to be attached to the peripheral region of the semiconductor chip. The second ends of the posts are configured to be attached to an external assembly, wherein the posts are able to absorb stress due to a thermal expansion mismatch between the external assembly and the interposer.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: February 25, 2003
    Assignee: Novellus Systems, Inc.
    Inventor: John Stephen Drewery
  • Publication number: 20020104751
    Abstract: Ionized Physical Vapor Deposition (IPVD) is provided by a method of apparatus (500) particularly useful for sputtering conductive metal coating material from an annular magnetron sputtering target (10). The sputtered material is ionized in a processing space between the target (10) and a substrate (100) by generating a dense plasma in the space with energy coupled from a coil (39) located outside of the vacuum chamber (501) behind a dielectric window (33) in the chamber wall (502) at the center of the opening (421) in the sputtering target. A Faraday type shield (26) physically shields the window to prevent coating material from coating the window, while allowing the inductive coupling of energy from the coil into the processing space.
    Type: Application
    Filed: June 29, 2001
    Publication date: August 8, 2002
    Inventors: John Stephen Drewery, Glyn Reynolds, Derrek Andrew Russell, Jozef Brcka, Mirko Vukovic, Michael James Grapperhaus, Frank Michael Cerio, Bruce David Gittleman
  • Patent number: 6287435
    Abstract: Ionized physical vapor deposition (IPVD) is provided by a method of apparatus for sputtering conductive metal coating material from an annular magnetron sputtering target. The sputtered material is ionized in a processing space between the target and a substrate by generating a dense plasma in the space with energy coupled from a coil located outside of the vacuum chamber behind a dielectric window in the chamber wall at the center of the opening in the sputtering target. Faraday type shields physically shield the window to prevent coating material from coating the window, while allowing the inductive coupling of energy from the coil into the processing space. The location of the coil in the plane of the target or behind the target allows the target to wafer spacing to be chosen to optimize film deposition rate and uniformity, and also provides for the advantages of a ring-shaped source without the problems associated with unwanted deposition in the opening at the target center.
    Type: Grant
    Filed: November 18, 1999
    Date of Patent: September 11, 2001
    Assignee: Tokyo Electron Limited
    Inventors: John Stephen Drewery, Glyn Reynolds, Derrek Andrew Russell, Jozef Brcka, Mirko Vukovic, Michael James Grapperhaus, Frank Michael Cerio, Jr., Bruce David Gittleman