Patents by Inventor John Victor D. Veliadis

John Victor D. Veliadis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8138569
    Abstract: A guard ring structure for use in a semiconductor device. The guard ring structure includes a semiconductor layer stack having a first layer and a second layer on top of the first layer, gates structures formed in the first layer; and guard rings formed in the first layer. The second layer has a dopant concentration that is higher than the dopant concentration of the first layer. The gates and the guard rings are formed simultaneously using a single mask.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: March 20, 2012
    Assignee: Northrop Grumman Systems Corporation
    Inventors: John Victor D. Veliadis, Megan J. Snook
  • Patent number: 8018022
    Abstract: A guard ring structure for use in a semiconductor device. The guard ring structure includes a semiconductor layer stack having a first layer and a second layer on top of the first layer, gates structures formed in the first layer; and guard rings formed in the first layer. The second layer has a dopant concentration that is higher than the dopant concentration of the first layer. The gates and the guard rings are formed simultaneously using a single mask.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: September 13, 2011
    Assignee: Northrop Grumman Systems Corporation
    Inventors: John Victor D. Veliadis, Megan J. Snook
  • Publication number: 20110049666
    Abstract: A guard ring structure for use in a semiconductor device. The guard ring structure includes a semiconductor layer stack having a first layer and a second layer on top of the first layer, gates structures formed in the first layer; and guard rings formed in the first layer. The second layer has a dopant concentration that is higher than the dopant concentration of the first layer. The gates and the guard rings are formed simultaneously using a single mask.
    Type: Application
    Filed: October 7, 2010
    Publication date: March 3, 2011
    Applicant: Northrop Grumman Systems Corporation
    Inventors: John Victor D. VELIADIS, Megan J. Snook
  • Publication number: 20110042776
    Abstract: A guard ring structure for use in a semiconductor device. The guard ring structure includes a semiconductor layer stack having a first layer and a second layer on top of the first layer, gates structures formed in the first layer; and guard rings formed in the first layer. The second layer has a dopant concentration that is higher than the dopant concentration of the first layer. The gates and the guard rings are formed simultaneously using a single mask.
    Type: Application
    Filed: October 7, 2010
    Publication date: February 24, 2011
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: JOHN VICTOR D. VELIADIS, MEGAN J. SNOOK
  • Patent number: 7825487
    Abstract: A guard ring structure for use in a semiconductor device. The guard ring structure includes a semiconductor layer stack having a first layer and a second layer on top of the first layer, gates structures formed in the first layer; and guard rings formed in the first layer. The second layer has a dopant concentration that is higher than the dopant concentration of the first layer. The gates and the guard rings are formed simultaneously using a single mask.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: November 2, 2010
    Assignee: Northrop Grumman Systems Corporation
    Inventors: John Victor D. Veliadis, Megan J. Snook
  • Patent number: 7800196
    Abstract: An exemplary edge termination structure maintains the breakdown voltage of the semiconductor device after it has been sawed off the wafer and packaged by creating an electric field stop layer at a periphery of the semiconductor device. The electric field stop layer has a dopant concentration higher than that of the layer in which an edge termination is implemented, such as a drift layer or a channel layer. The electric field stop layer may be created by selectively masking the peripheries of the device during the device processing, i.e., mesa etch, to protect and preserve the highly doped material at the peripheries of the device.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: September 21, 2010
    Assignee: Northrop Grumman Systems Corporation
    Inventors: John Victor D. Veliadis, Ty R. McNutt
  • Patent number: 6452184
    Abstract: A composite phosphor screen for converting radiation, such as X-rays, into visible light. The screen includes a planar surface, which can be formed from glass, silicon or metal, which has etched therein a multiplicity of closely spaced microchannels having diameters of the order of 10 microns or less. Deposited within each of the microchannels is a multiplicity of phosphors which emit light when acted upon by radiation. A photomultiplier, which may be microchannel based, is integrated with the X-ray detector so as to provide an enhanced output for use with low level X-ray of for cine or fluoroscopy applications. The walls of the microchannels and/or the substrate surfaces include dielectric stack based light reflective coatings.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: September 17, 2002
    Assignee: Nanocrystal Imaging Corp.
    Inventors: Nikhil R. Taskar, John Victor D. Veliadis, Vishal Chhabra, Bharail Kulkarni, Neeta Pandit, Rameshwar Nath Bhargava, Roger Delano
  • Patent number: 6300640
    Abstract: A composite phosphor screen for converting radiation, such as X-rays, into visible light. The screen includes a planar surface, which can be formed from glass, silicon or metal, which has etched therein a multiplicity of closely spaced microchannels having diameters of the order of 10 microns or less. Deposited within each of the microchannels is a multiplicity of phosphors which emit light when acted upon by radiation. The walls of the microchannels and/or the substrate surfaces include light reflective coatings so as to reflect the light emitted by the phosphors to the light collecting devices, such as film or an electronic detector. The coatings can be either radiation transparent or filtering/attenuating depending on the particular application.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: October 9, 2001
    Assignee: Nanocrystal Imaging Corporation
    Inventors: Rameshwar Nath Bhargava, Nikhil R. Taskar, Vishal Chhabra, John Victor D. Veliadis