Abstract: Technologies for computing context replay include a computing device having a persistent memory and a volatile memory. The computing device creates multiple snapshots that are each indicative of a user's computing context at a corresponding sync point. The snapshots may include metadata created in response to system events, memory snapshots stored in a virtual machine, and/or video data corresponding to the computing context. At least a part of the snapshots are stored in the persistent memory. The computing device presents a timeline user interface based on the snapshots. The timeline includes multiple elements that are associated with corresponding sync points. The timeline elements may visually indicate a salience value that has been determined for each corresponding sync point. In response to a user selection of a sync point, the computing device activates a computing context corresponding to the snapshot for the selected sync point. Other embodiments are described and claimed.

Abstract: In one example, a system can receive an order from a client device. The system can also receive data about a set of print queues at a set of printers via a network. The system can then determine a set of queue times corresponding to the set of print queues. Each respective queue time can be determined based on a corresponding print queue. The system can generate an estimated wait time for the order based on the set of queue times. The system can then transmit the estimated wait time to the client device for display in a graphical user interface to a user associated with the order.

Abstract: In an example, there is disclosed a computing system, including: a processor; a memory; a configuration interface to a logic configuration unit; and a system compiler including: a first block compiler to compile logic for a first logical block in a first language, the first language being a domain-specific language (DSL) and the first logical block being switching logic for a network switch; a second block compiler to compile logic for a second logical block in a second language, the second language being a non-DSL and providing an external accelerator method not supported by the first language; and an interface compiler to define input/output channels for encapsulated data interchange between the first logical block and the second logical block, wherein the encapsulated data interchange is to target a resident instance of the external accelerator method.

Abstract: In an example, there is disclosed a computing system, including: a processor; a memory; a configuration interface to a logic configuration unit; and a system compiler including: a first block compiler to compile logic for a first logical block in a first language, the first language being a domain-specific language (DSL) and the first logical block being switching logic for a network switch; a second block compiler to compile logic for a second logical block in a second language, the second language being a non-DSL and providing an external accelerator method not supported by the first language; and an interface compiler to define input/output channels for encapsulated data interchange between the first logical block and the second logical block, wherein the encapsulated data interchange is to target a resident instance of the external accelerator method.

Abstract: In one embodiment, an apparatus cascades groups of serialized data streams through devices, and performs operations based on information communicated therein. A received group of serialized data streams is aligned, but not framed, and forwarded to a next device (e.g., a next stage in a linear or tree cascaded formation of devices). Eliminating the framing and subsequent serialization operations performed on the received group of serialized data streams reduces the latency of communications through the cascaded devices, which can be significant when considered in relation to the high-speed communication rates. The received group of serialized data streams is also framed to create a sequence of data frames for processing (e.g., associative memory lookup operations, controlling multiplexing of received downstream serialized data streams, general or other processing) within the device.

Abstract: In one embodiment, an apparatus cascades groups of serialized data streams through devices, and performs operations based on information communicated therein. A received group of serialized data streams is aligned, but not framed, and forwarded to a next device (e.g., a next stage in a linear or tree cascaded formation of devices). Eliminating the framing and subsequent serialization operations performed on the received group of serialized data streams reduces the latency of communications through the cascaded devices, which can be significant when considered in relation to the high-speed communication rates. The received group of serialized data streams is also framed to create a sequence of data frames for processing (e.g., associative memory lookup operations, controlling multiplexing of received downstream serialized data streams, general or other processing) within the device.

Abstract: A versatile and efficient technique for classifying packets in an intermediate node. According to the technique, criteria and rules associated with the packet are applied to one or more classification stages containing content-addressable memories (CAMs). Each stage examines specific criteria associated with the packet, e.g., a packet field, and generates a rule and additional criteria. The additional rule and criteria are provided to the next classification stage. This process continues until a final rule is provided to a final classification stage. At the final classification stage, the final rule is used to generate an identifier, e.g., queue identifier (ID), associated with the classified packet.

Abstract: A technique modifies data transferred from a source to a destination on an intermediate node in a network. According to the technique, a processor of the node issues commands to modify the data. The commands are held in a data structure and not performed on the data until the data is transferred from the source to the destination. As the data is transferred the commands contained in the data structure are performed and the data is modified as directed by the commands.

Abstract: A technique for improving utilization of a data link coupled to a network. Scores are generated for one or more data flows that transfer onto the network via the data link. The scores are kept in a “scorecard” that represents a pool of data flows that are eligible to transfer data onto the data link when the data link becomes idle. Each score represents a rating of a particular data flow's eligibility to transfer data onto the data link when it becomes idle. A check is performed to determine if the data link is idle, and, if so, data associated with the highest scoring data flow are transferred onto the data link.

Abstract: A technique efficiently accesses locks associated with resources in a computer system. A processor accesses (e.g., acquires or releases) a lock by specifying and issuing a request to a resource controller, the request containing attribute and resource location information associated with the lock. In response, the resource controller applies the information contained in the request to an outstanding lock data structure to determine if the request should be blocked, blocked as a pending writer, allowed or an error condition. If the request is blocked, it remains blocked until the outstanding lock blocking the request is released. If the request is allowed, operations associated with the request are performed.

Abstract: A system and method for enabling a processor to access a memory not directly coupled to the processor. A memory request, including a request identifier field, is issued by a processor to a local memory management unit (MMU). Using the request identifier field, the local MMU determines whether the memory request should be issued by the local memory management unit (MMU) to a local memory, or should be transferred by the local MMU to a remote MMU and issued by the remote MMU to a remote memory, the remote memory associated with a different processor. In this manner, the remote MMU issues certain memory requests on behalf of the local processor and returns any results back to the local processor.

Abstract: A technique for enabling a processor to access a memory not directly coupled to the processor. According to the technique, a local processor accesses a remote memory by issuing a memory request that contains an indicator that indicates the request is addressed to the remote memory. The request is then transferred to a remote memory management unit (MMU) coupled to the remote memory. The remote MMU acts as a proxy and issues the memory request to the remote memory on behalf of the local processor. The results of the request, if any, are returned to the local processor.

Abstract: The invention provides a method and system for quickly and preemptively controlling the outbreak of destructive software applications sent in an electronic messaging system. Such system and method provide an additional component to an electronic messaging system to detect and block possible malicious applications in attachments of electronic messages. The additional component can be customized to suit the electronic messaging system and reconfigured to accommodate future virus threats.

Abstract: A technique is provided for use in computerized modeling of an electronic system. The technique bases simulation of the system's operation (e.g., timing operation) upon both actual physical characteristics of a part of the system, and hierarchical analysis-based models of the rest of the system.

Abstract: A versatile and efficient technique for classifying packets in an intermediate node. According to the technique, criteria and rules associated with the packet are applied to one or more classification stages containing content-addressable memories (CAMs). Each stage examines specific criteria associated with the packet, e.g., a packet field, and generates a rule and additional criteria. The additional rule and criteria are provided to the next classification stage. This process continues until a final rule is provided to a final classification stage. At the final classification stage, the final rule is used to generate an identifier, e.g., queue identifier (ID), associated with the classified packet.

Abstract: The present invention entails a combustion type engine of the internal reciprocally mounted piston type. Formed adjacent the conventional combustion pistons and communicatively open thereto are a series of steam pistons reciprocally mounted in alignment in face-to-face relationship with said combustion pistons. A steam generator is provided and utilizes engine exhaust heat to produce steam that is directed to the cylinders having said steam pistons reciprocally mounted for driving the same in time relationship to the reciprocal movement of said combustion pistons. Essentially the steam pistons are driven such that they assist in driving the combustion pistons by exerting a force against the combustion pistons during the ignition or combustion stroke of the combustion pistons.

Abstract: A polynomial based apparatus, such as an error correcting apparatus, is checked by repeatedly supplying test bits to the apparatus. On even cycles, the modulo two sum of the signal contents should be zero, while on odd cycles it should be equal to the pattern used for test purposes.