Abstract: Systems and methods are disclosed for atomic memory operations for address translation. For example, an integrated circuit (e.g., a processor) for executing instructions includes a memory system including random access memory; a bus connected to the memory system; and an atomic memory operation circuitry configured to receive a request from the bus to access an entry in a page table stored in the memory system, wherein the request includes an indication of whether an instruction that references an address being translated using the entry is a store instruction; access the entry in the page table; responsive to the indication indicating that the instruction is a store instruction, set a dirty bit of the entry in the page table; and transmit contents of the entry on the bus in response to the request.

Abstract: A planar insertion device and supporting structure for a planar insertion device for treating a synchrotron radiation beam includes a primary frame on which at least two secondary C-frames are mounted. An upper and a lower girders are mounted on the secondary C-frames forming a gap between girders and arranged substantially horizontally and parallel to each other and to the synchrotron radiation beam. Magnetic arrays rigidly mounted on the girders are facing each other and facing the gap between girders, with the synchrotron radiation beam passing between the magnetic arrays through the gap. The planar insertion device supporting structure prevents detrimental deformation reactions to variations of magnetic loadings with changes in the gap and subsequent geometrical misalignments.

Abstract: A Grignard process for preparing phenyl-containing chlorosilane products, in particular diphenylchlorosilanes, is carried out in three embodiments. In the first embodiment, the reactants of the Grignard process are a phenyl Grignard reagent, an ether solvent, a trichlorosilane, and an aromatic hydrocarbon coupling solvent. In the second embodiment, the reactants of the Grignard process are a phenyl Grignard reagent, an ether solvent, a phenylchlorosilane, and an aromatic hydrocarbon coupling solvent. In the third embodiment, the reactants of the Grignard process are a phenyl Grignard reagent, an ether solvent, a trichlorosilane, a phenylchlorosilane, and an aromatic hydrocarbon coupling solvent. In each embodiment, the reactants are present in a particular mole ratio.

Abstract: Methods and apparatus are provided for a liquid crystal microdisplay. The apparatus comprises a display driver integrated circuit, a memory, and at least one liquid crystal microdisplay. The memory is coupled to the display driver integrated circuit. The at least one liquid crystal display is also coupled to the display driver integrated circuit. A frame of video information is written to the memory in a same time period as a previously stored frame of video information is read from the memory more than one time. The previously stored frame of video information that is read from memory more than one time is provided to the at least one liquid crystal microdisplay. The method comprises identifying the start of an incoming frame of video information. The incoming frame of video information is written to a memory within a time period having a predetermined duration. A previously stored frame of video information is read from the memory more than one time and provided to the liquid crystal microdisplay.

Abstract: Methods and apparatus are provided for driving a liquid crystal microdisplay. The apparatus comprises more than one display driver integrated circuit where a liquid crystal microdisplay receives video information from at least two separate and distinct display driver integrated circuits. One of the display driver integrated circuits is designated as producing a master clock. The internal clocks of the other display driver integrated circuits are compared to the master clock and adjusted to reduce the phase difference to a delay that does not produce visible artifacts on the microdisplay. The frame polarity is compared to be the same from each integrated circuit driving the microdisplay before outputting video information. A frame synchronization signal is also generated from each display driver integrated circuit to ensure that they are all ready to provide information to the microdisplay.

Abstract: The bearing for a railway vehicle axle comprises a bearing block of aluminium alloy having a thermal conductivity in excess of 0.20 of cal/sec/cm. cube/.degree.C. The block has a part-cylindrical bore and a bearing surface of babbitt is provided on the bore and ends of the block to support an axle of a railway vehicle.