Patents by Inventor John Wayne Simmons
John Wayne Simmons has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8952761Abstract: In accordance with some embodiments of the present disclosure, an oscillator circuit comprises, a first pad associated with a first terminal of an oscillator and a second pad associated with a second terminal of the oscillator. The oscillator is configured to generate an oscillating signal and communicate the oscillating signal from the second terminal to a clock distributor coupled to the second pad. The oscillator circuit further comprises an oscillator gain element comprising an output node coupled to the first pad and an input node coupled to the second pad. The oscillator circuit also comprises a digital-to-analog converter (DAC) coupled to the first pad. The oscillator circuit additionally comprises a switching circuit coupled to the gain element. The switching circuit is configured to enable the gain element when the oscillator comprises a resonator and disable the gain element when the oscillator comprises a voltage controlled oscillating module.Type: GrantFiled: June 6, 2013Date of Patent: February 10, 2015Assignee: Intel IP CorporationInventors: Kristopher Kevin Kaufman, John Wayne Simmons
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Publication number: 20130285755Abstract: In accordance with some embodiments of the present disclosure, an oscillator circuit comprises, a first pad associated with a first terminal of an oscillator and a second pad associated with a second terminal of the oscillator. The oscillator is configured to generate an oscillating signal and communicate the oscillating signal from the second terminal to a clock distributor coupled to the second pad. The oscillator circuit further comprises an oscillator gain element comprising an output node coupled to the first pad and an input node coupled to the second pad. The oscillator circuit also comprises a digital-to-analog converter (DAC) coupled to the first pad. The oscillator circuit additionally comprises a switching circuit coupled to the gain element. The switching circuit is configured to enable the gain element when the oscillator comprises a resonator and disable the gain element when the oscillator comprises a voltage controlled oscillating module.Type: ApplicationFiled: June 6, 2013Publication date: October 31, 2013Inventors: Kristopher Kevin Kaufman, John Wayne Simmons
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Patent number: 8466752Abstract: In accordance with some embodiments of the present disclosure, an oscillator circuit comprises, a first pad associated with a first terminal of an oscillator and a second pad associated with a second terminal of the oscillator. The oscillator is configured to generate an oscillating signal and communicate the oscillating signal from the second terminal to a clock distributor coupled to the second pad. The oscillator circuit further comprises an oscillator gain element comprising an output node coupled to the first pad and an input node coupled to the second pad. The oscillator circuit also comprises a digital-to-analog converter (DAC) coupled to the first pad. The oscillator circuit additionally comprises a switching circuit coupled to the gain element. The switching circuit is configured to enable the gain element when the oscillator comprises a resonator and disable the gain element when the oscillator comprises a voltage controlled oscillating module.Type: GrantFiled: May 4, 2011Date of Patent: June 18, 2013Assignee: Fujitsu Semiconductor LimitedInventors: Kristopher Kevin Kaufman, John Wayne Simmons
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Patent number: 8436595Abstract: Systems and methods for reducing voltage undershoot and overshoot of a voltage regulator are disclosed. In one embodiment of the present disclosure, an undershoot/overshoot regulation circuit comprises a control node having a control voltage. The regulation circuit also comprises a control circuit configured to increase the control voltage in response to a load being applied to an output node of a voltage regulator and decrease the control voltage in response to the load being removed from the output node. The regulation circuit also comprises a control capacitor including a first terminal coupled to the control node and a second terminal coupled to a gate node of the voltage regulator. The control capacitor is configured to increase a gate voltage at the gate node in response to the increase of the control voltage, and decrease the gate voltage in response to the decrease of the control voltage.Type: GrantFiled: October 11, 2010Date of Patent: May 7, 2013Assignee: Fujitsu Semiconductor LimitedInventors: John Wayne Simmons, Kai Zhong
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Publication number: 20120280842Abstract: In accordance with some embodiments of the present disclosure, an oscillator circuit comprises, a first pad associated with a first terminal of an oscillator and a second pad associated with a second terminal of the oscillator. The oscillator is configured to generate an oscillating signal and communicate the oscillating signal from the second terminal to a clock distributor coupled to the second pad. The oscillator circuit further comprises an oscillator gain element comprising an output node coupled to the first pad and an input node coupled to the second pad. The oscillator circuit also comprises a digital-to-analog converter (DAC) coupled to the first pad. The oscillator circuit additionally comprises a switching circuit coupled to the gain element. The switching circuit is configured to enable the gain element when the oscillator comprises a resonator and disable the gain element when the oscillator comprises a voltage controlled oscillating module.Type: ApplicationFiled: May 4, 2011Publication date: November 8, 2012Inventors: Kristopher Kevin Kaufman, John Wayne Simmons
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Publication number: 20120206209Abstract: An oscillator may include a crystal resonator, an active element coupled in parallel with the crystal resonator and configured to produce at its output a waveform with an approximate 180-degree phase shift from its input, a voltage regulator a voltage regulator coupled to the active element, a sum of thresholds circuit coupled to the input of the voltage regulator, and a temperature-dependent current source coupled to the input of the voltage regulator. The voltage regulator may be configured to supply a supply voltage to the active element, the supply voltage a function of a reference voltage received at an input of the voltage regulator. The sum of thresholds circuit may be configured to generate the reference voltage such that the reference voltage is process-dependent. The temperature-dependent current source may be configured to generate a temperature-dependent current such that the reference voltage is temperature-dependent.Type: ApplicationFiled: February 14, 2011Publication date: August 16, 2012Inventors: Kristopher Kevin Kaufman, John Wayne Simmons
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Publication number: 20120086420Abstract: Systems and methods for reducing voltage undershoot and overshoot of a voltage regulator are disclosed. In one embodiment of the present disclosure, an undershoot/overshoot regulation circuit comprises a control node having a control voltage. The regulation circuit also comprises a control circuit configured to increase the control voltage in response to a load being applied to an output node of a voltage regulator and decrease the control voltage in response to the load being removed from the output node. The regulation circuit also comprises a control capacitor including a first terminal coupled to the control node and a second terminal coupled to a gate node of the voltage regulator. The control capacitor is configured to increase a gate voltage at the gate node in response to the increase of the control voltage, and decrease the gate voltage in response to the decrease of the control voltage.Type: ApplicationFiled: October 11, 2010Publication date: April 12, 2012Inventors: John Wayne Simmons, Kai Zhong
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Patent number: 5844448Abstract: An oscillator circuit (10) having an optimized start up time includes an inverting amplifier (12) coupled in parallel to a crystal (14), a first bank of capacitors (16) coupled to the crystal, and a second bank of capacitors (20) switchably coupled (18) in parallel to the frequency resonant network, wherein the second bank of capacitors has a higher capacitance load than the first bank of capacitors. The oscillator circuit may also include a processor (62) for controlling when the second bank of capacitors gets switched and coupled to the crystal.Type: GrantFiled: September 12, 1997Date of Patent: December 1, 1998Assignee: Motorola, Inc.Inventors: Keith Edward Jackoski, John Wayne Simmons, Gerald Paul Schwieterman
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Patent number: 5770980Abstract: A low power, fast starting oscillator (10) of the Colpitts type includes an amplifier (12) that provides voltage gain and feeds a source follower circuit (14) that provides a desirable output impedance. A crystal (16) is coupled from an output of the source follower circuit (14) back to the amplifier's input (32). The voltage gain of the amplifier (12) and the output impedance of the source follower circuit (14) are independently selectable to provide an optimum transconductance for the oscillator (10) to start quickly. When oscillations reach a threshold value, the transconductance may be reduced to save power.Type: GrantFiled: December 23, 1996Date of Patent: June 23, 1998Assignee: Motorola, Inc.Inventors: Raymond Louis Barrett, Jr., John Wayne Simmons, Barry Herold, Grazyna A. Pajunen
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Patent number: 5701600Abstract: A method of calibrating a radio receiver (100) which has a desired IF center frequency (fo) includes generating and applying to the receiver's demodulator (126) a plurality of reference signals. The demodulated reference signals are used to generate, for the demodulator, a transfer function that is predictive of amplitude versus frequency characteristics of signals to be demodulated by the demodulator (126). The transfer function (202) is used to determine a frequency offset between a received signal's intermediate frequency and the desired frequency fo. The determined frequency offset is used to adjust the IF frequency of the received signal towards the desired frequency fo. The adjustment process preferably continues until the frequency offset is below a desired threshold. A receiver using the disclosed method is also described.Type: GrantFiled: July 17, 1995Date of Patent: December 23, 1997Assignee: Motorola, Inc.Inventors: John Wetters, John Wayne Simmons, Virgilio Alejandro Fernandez, Art Ahrens, Steve Carsello