Abstract: A device having a substrate and a dielectric layer disposed over the substrate is disclosed. The device includes a transformer layout disposed in the dielectric layer. The transformer layout includes an integrated transformer having primary and secondary coil elements. The first and second coil elements are configured to result in noise-self cancellation effect.

Abstract: A method of manufacture of an integrated circuit system includes: providing a substrate including front-end-of-line circuitry; forming a first group of metal layers including a first finger and a second finger over the substrate utilizing a first design rule, the first group of metal layers being formed without a finger via; forming a second group of metal layers including a first finger, a second finger, and a finger via over the first group of metal layers utilizing a second design rule that is larger than the first design rule; and interconnecting the first group of metal layers, including interconnecting a first cluster adjacent to a second cluster, to form a capacitor.

Abstract: A device having a substrate and a dielectric layer disposed over the substrate is disclosed. The device includes a transformer layout disposed in the dielectric layer. The transformer layout includes an integrated transformer having primary and secondary coil elements. The first and second coil elements are configured to result in noise-self cancellation effect.

Abstract: An inductor circuit with high quality (Q) factor includes a primary inductor and a compensation sub-circuit. The compensation sub-circuit is electrically isolated from the primary inductor. The compensation sub-circuit is magnetically coupled with the primary inductor to compensate the loss in the primary inductor.

Abstract: A method of manufacture of an integrated circuit system includes: providing a substrate including front-end-of-line circuitry; forming a first group of metal layers including a first finger and a second finger over the substrate utilizing a first design rule, the first group of metal layers being formed without a finger via; forming a second group of metal layers including a first finger, a second finger, and a finger via over the first group of metal layers utilizing a second design rule that is larger than the first design rule; and interconnecting the first group of metal layers, including interconnecting a first cluster adjacent to a second cluster, to form a capacitor.

Abstract: A method of manufacture of an integrated circuit system includes: providing a substrate including front-end-of-line circuitry; forming a first group of metal layers including a first finger and a second finger over the substrate utilizing a first design rule, the first group of metal layers being formed without a finger via; forming a second group of metal layers including a first finger, a second finger, and a finger via over the first group of metal layers utilizing a second design rule that is larger than the first design rule; and interconnecting the first group of metal layers with the second group of metal layers to form a capacitor.

Abstract: A method of manufacture of an integrated circuit system includes: providing a substrate including front-end-of-line circuitry; forming a first group of metal layers including a first finger and a second finger over the substrate utilizing a first design rule, the first group of metal layers being formed without a finger via; forming a second group of metal layers including a first finger, a second finger, and a finger via over the first group of metal layers utilizing a second design rule that is larger than the first design rule; and interconnecting the first group of metal layers with the second group of metal layers to form a capacitor.

Abstract: An inductor circuit with high quality (Q) factor includes a primary inductor and a compensation sub-circuit. The compensation sub-circuit is electrically isolated from the primary inductor. The compensation sub-circuit is magnetically coupled with the primary inductor to compensate the loss in the primary inductor.

Abstract: A method of fabricating an inductor using bonding techniques in the manufacture of integrated circuits is described. Bonding pads are provided over a semiconductor substrate. Input/output connections are made to at least two of the bonding pads. A plurality of wire bond loops are made between each two of the bonding pads wherein the plurality of wire bond loops forms the inductor.

Abstract: In this invention a single additional capacitor is added to a tuned cascode LNA which boosts the circuit Q and the gain of the amplifier. The added capacitor creates a negative real part of the impedance which when combined with the impedance of the LC tank circuit improves both the Q and the gain of the amplifier. The capacitor does not dissipate any power, and being a passive device the capacitor does not add additional noise to the circuit. With an improved gain there is a much improved signal to noise ratio. The higher Q allows the amplifier to provide some additional bandpass and reduce image reduction requirements in subsequent amplifier stages.

Abstract: A new method of fabricating an inductor utilizing air as an underlying barrier in the manufacturing of integrated circuits is described. A field oxide region is formed in and on a semiconductor substrate and then removed whereby a well is left in the semiconductor substrate. A polish stop layer is deposited over the substrate and within the well. The polish stop layer is covered and the well filled with a spin-on-glass layer. The spin-on-glass layer is polished back to the polish stop layer. The said polish stop layer is removed. A first oxide layer is deposited overlying the spin-on-glass layer and the semiconductor substrate and is patterned using an inductor reticle whereby a plurality of openings are made through the first oxide layer to the spin-on-glass layer. All of the spin-on-glass layer within the well is removed through the plurality of openings.