Patents by Inventor Jon J. Candelaria
Jon J. Candelaria has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8516075Abstract: A system and method for providing supplemental content associated with an information device includes a user device detecting (700) the information device and that the information device has associated supplemental content. A next step includes requesting (702) a delivery of the supplemental content. A next step includes delivering (704) the supplemental content to a remote device, such as a home television. A next step includes presenting (706) the supplemental content to a user on the remote device.Type: GrantFiled: March 30, 2011Date of Patent: August 20, 2013Assignee: Motorola Solutions, Inc.Inventors: Ananth Seetharam, Jon J. Candelaria, Shrikant S. Naidu, Jon L. Schindler
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Publication number: 20120254347Abstract: A system and method for providing supplemental content associated with an information device includes a user device detecting (700) the information device and that the information device has associated supplemental content. A next step includes requesting (702) a delivery of the supplemental content. A next step includes delivering (704) the supplemental content to a remote device, such as a home television.Type: ApplicationFiled: March 30, 2011Publication date: October 4, 2012Applicant: MOTOROLA SOLUTIONS, INC.Inventors: Ananth Seetharam, Jon J. Candelaria, Shrikant S. Naidu, Jon L. Schindler
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Publication number: 20080072961Abstract: A sensitized photovoltaic device (10) provides for a reduction of the charge recombination rate and charge transport time. The device (10) includes a first electrode (12) comprising a transparent conducting oxide and a plurality of carbon nanostructures (16) formed thereon. A first layer (18) is formed on the carbon nanostructure (16) and comprises a first conduction band level (44). A second layer (20) is formed on the first oxide (18) and comprises a second conduction band level (46) higher than the first conduction band level (44). A sensitizer (22) is formed on the second layer (20) and comprises a lowest unoccupied molecular orbital level (48) higher than the second conduction band level (46). An electrolyte (24) is positioned over the sensitizer (22), and a second electrode (26) comprising a transparent conducting oxide and a layer of catalyst is formed over the electrolyte (24).Type: ApplicationFiled: September 26, 2006Publication date: March 27, 2008Inventors: Yong Liang, Jon J. Candelaria, Kurt W. Eisenbeiser, Yi Wei
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Patent number: 7214999Abstract: An exemplary system and method for providing an integrated photosensing element suitably adapted for use in CMOS imaging applications is disclosed as comprising inter alia: a processed CMOS host wafer (460) bonded with a monocrystalline, optically active donor wafer (300); a photosensing element (390) integrated in said optically active donor wafer (300) having an interconnect via (505, 495, 485) substantially decoupled from the photosensing element (390), wherein the host (460) and donor (300) wafers are bonded through the optically active material in a region disposed near a metalization surface (450, 455, 445) of the CMOS layer (460) in order to allow fabrication of the interconnect (505, 495, 485). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize photosensing performance or other material characteristics.Type: GrantFiled: August 26, 2004Date of Patent: May 8, 2007Assignee: Motorola, Inc.Inventors: Paige Holm, Jon J. Candelaria
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Patent number: 6984816Abstract: An exemplary system and method for providing a vertically integrated photosensing element suitably adapted for use in CMOS imaging applications is disclosed as comprising inter alia: a processed CMOS layer (420); and a photosensing element (380) fabricated in a vertically integrated optically active layer (320, 350), where the optically active layer (320, 350) is bonded to the CMOS layer (420) and the optically active layer (320, 350) is positioned near a metalization surface (405) of the CMOS layer (420). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize photosensing performance or other material characteristics.Type: GrantFiled: August 13, 2003Date of Patent: January 10, 2006Assignee: Motorola, Inc.Inventors: Paige M. Holm, Jon J. Candelaria
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Patent number: 6927432Abstract: An exemplary system and method for providing a vertically integrated photosensing element suitably adapted for use in CMOS imaging applications is disclosed as comprising inter alia: a processed CMOS layer (420); and a photosensing element (380) fabricated in a vertically integrated optically active layer (320, 350), where the optically active layer (320, 350) is bonded to the CMOS layer (420) and the optically active layer (320, 350) is positioned near a metalization surface (405) of the CMOS layer (420). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize photosensing performance or other material characteristics.Type: GrantFiled: August 13, 2003Date of Patent: August 9, 2005Assignee: Motorola, Inc.Inventors: Paige M. Holm, Jon J. Candelaria
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Patent number: 6809008Abstract: An exemplary system and method for providing an integrated photosensing element suitably adapted for use in CMOS imaging applications is disclosed as comprising inter alia: a processed CMOS host wafer (460) bonded with a monocrystalline, optically active donor wafer (300); a photosensing element (390) integrated in said optically active donor wafer (300) having an interconnect via (505, 495, 485) substantially decoupled from the photosensing element (390), wherein the host (460) and donor (300) wafers are bonded through the optically active material in a region disposed near a metalization surface (450, 455, 445) of the CMOS layer (460) in order to allow fabrication of the interconnect (505, 495, 485). Disclosed features and specifications may be variously controlled, configured, adapted or otherwise optionally modified to further improve or otherwise optimize photosensing performance or other material characteristics.Type: GrantFiled: August 28, 2003Date of Patent: October 26, 2004Assignee: Motorola, Inc.Inventors: Paige M. Holm, Jon J. Candelaria
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Patent number: 5712501Abstract: A graded-channel semiconductor device (10) includes a substrate region (11) having a major surface (12). A source region (13) and a drain region (14) are formed in the substrate region (11) and are spaced apart to form a channel region (16). A doped region (18) is formed in the channel region (16) and is spaced apart from the source region (13), the drain region (14), and the major surface (12). The doped region (18) has the same conductivity type as the channel region (16), but has a higher dopant concentration. The device (10) exhibits an enhanced punch-through resistance and improved performance compared to prior art short channel structures.Type: GrantFiled: October 10, 1995Date of Patent: January 27, 1998Assignee: Motorola, Inc.Inventors: Robert B. Davies, Frank K. Baker, Jon J. Candelaria, Andreas A. Wild, Peter J. Zdebel
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Patent number: 5683934Abstract: An enhanced mobility MOSFET device (10) comprises a channel layer (12) formed on a monocrystalline silicon layer (11). The channel layer (12) comprises an alloy of silicon and a second material with the second material substitutionally present in silicon lattice sites at an atomic percentage that places the channel layer (12) under a tensile stress.Type: GrantFiled: May 3, 1996Date of Patent: November 4, 1997Assignee: Motorola, Inc.Inventor: Jon J. Candelaria
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Patent number: 5561302Abstract: An enhanced mobility MOSFET device (10) comprises a channel layer (12) formed on a monocrystalline silicon layer (11). The channel layer (12) comprises an alloy of silicon and a second material with the second material substitutionally present in silicon lattice sites at an atomic percentage that places the channel layer (12) under a tensile stress.Type: GrantFiled: September 26, 1994Date of Patent: October 1, 1996Assignee: Motorola, Inc.Inventor: Jon J. Candelaria
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Patent number: 5441901Abstract: A IV-IV semiconductor device having a narrowed bandgap characteristic compared to silicon and method is provided. By incorporating carbon into silicon at a substitutional concentration of between 0.5% and 1.1%, a semiconductor device having a narrowed bandgap compared to silicon and good crystalline quality is achieved. The semiconductor device is suitable for semiconductor heterojunction devices that use narrowed bandgap regions.Type: GrantFiled: June 10, 1994Date of Patent: August 15, 1995Assignee: Motorola, Inc.Inventor: Jon J. Candelaria
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Patent number: 5360986Abstract: A IV--IV semiconductor device having a narrowed bandgap characteristic compared to silicon and method is provided. By incorporating carbon into silicon at a substitutional concentration of between 0.5% and 1.1%, a semiconductor device having a narrowed bandgap compared to silicon and good crystalline quality is achieved. The semiconductor device is suitable for semiconductor heterojunction devices that use narrowed bandgap regions.Type: GrantFiled: October 5, 1993Date of Patent: November 1, 1994Assignee: Motorola, Inc.Inventor: Jon J. Candelaria