Patents by Inventor Jonathan A. Orth

Jonathan A. Orth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240066804
    Abstract: A system for forming an object having a three-dimensional structure, the system comprising: a container for providing a photo-curable material to be polymerized; a rotatable stage for supporting the container; a light source for providing light rays having at least one light pattern to be guided into the container via an optical assembly; a processing unit for determining the light source's degree of non-telecentricity, and determining an optimally pre-distorted set of the at least one light pattern based on at least the photo-curable material's refractive index; correcting at least one distortion of the light rays caused by refraction at the container interface and/or correcting at least one distortion of the light rays caused by non-telecentricity; and whereby the correction of the at least one distortion of the light rays is performed without altering the calibration of the optical assembly.
    Type: Application
    Filed: January 7, 2022
    Publication date: February 29, 2024
    Inventors: Antony ORTH, Kathleen SAMPSON, Jonathan BOISVERT, Chantal PAQUET
  • Patent number: 6222936
    Abstract: An arrangement for optimizing a lithographic process forms a pattern on a silicon wafer using a photocluster cell system to simulate an actual processing condition for a semiconductor product. The resist pattern is then inspected using a wafer inspection system. An in-line low voltage scanning electron microscope (SEM) system reviews and classifies defect types, enabling generation of an alternative processing specification. The alternative processing specification can then be tested by forming patterns on different wafers, and then performing split-series testing to analyze the patterns on the different wafers for comparison with the existing lithographic process and qualification for production.
    Type: Grant
    Filed: September 13, 1999
    Date of Patent: April 24, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Khoi A. Phan, Gurjeet S. Bains, David A. Steele, Jonathan A. Orth, Ramkumar Subramanian
  • Patent number: 5985497
    Abstract: An arrangement for optimizing a lithographic process forms a pattern on a silicon wafer using a photocluster cell system to simulate an actual processing condition for a semiconductor product. The resist pattern is then inspected using a wafer inspection system. An in-line low voltage scanning electron microscope (SEM) system reviews and classifies defect types, enabling generation of an alternative processing specification. The alternative processing specification can then be tested by forming patterns on different wafers, and then performing split-series testing to analyze the patterns on the different wafers for comparison with the existing lithographic process and qualification for production.
    Type: Grant
    Filed: February 3, 1998
    Date of Patent: November 16, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Khoi A. Phan, Gurjeet S. Bains, David A. Steele, Jonathan A. Orth, Ramkumar Subramanian