Patents by Inventor Jonathan C. Hall
Jonathan C. Hall has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230137812Abstract: According to one embodiment, a processor includes an instruction decoder to decode a first instruction to gather data elements from memory, the first instruction having a first operand specifying a first storage location and a second operand specifying a first memory address storing a plurality of data elements. The processor further includes an execution unit coupled to the instruction decoder, in response to the first instruction, to read contiguous a first and a second of the data elements from a memory location based on the first memory address indicated by the second operand, and to store the first data element in a first entry of the first storage location and a second data element in a second entry of a second storage location corresponding to the first entry of the first storage location.Type: ApplicationFiled: December 31, 2022Publication date: May 4, 2023Inventors: Andrew T. FORSYTH, Brian J. HICKMANN, Jonathan C. HALL, Christopher J. HUGHES
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Patent number: 11599362Abstract: According to one embodiment, a processor includes an instruction decoder to decode a first instruction to gather data elements from memory, the first instruction having a first operand specifying a first storage location and a second operand specifying a first memory address storing a plurality of data elements. The processor further includes an execution unit coupled to the instruction decoder, in response to the first instruction, to read contiguous a first and a second of the data elements from a memory location based on the first memory address indicated by the second operand, and to store the first data element in a first entry of the first storage location and a second data element in a second entry of a second storage location corresponding to the first entry of the first storage location.Type: GrantFiled: May 10, 2021Date of Patent: March 7, 2023Assignee: INTEL CORPORATIONInventors: Andrew T. Forsyth, Brian J. Hickmann, Jonathan C. Hall, Christopher J. Hughes
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Publication number: 20210406026Abstract: According to one embodiment, a processor includes an instruction decoder to decode a first instruction to gather data elements from memory, the first instruction having a first operand specifying a first storage location and a second operand specifying a first memory address storing a plurality of data elements. The processor further includes an execution unit coupled to the instruction decoder, in response to the first instruction, to read contiguous a first and a second of the data elements from a memory location based on the first memory address indicated by the second operand, and to store the first data element in a first entry of the first storage location and a second data element in a second entry of a second storage location corresponding to the first entry of the first storage location.Type: ApplicationFiled: May 10, 2021Publication date: December 30, 2021Inventors: Andrew T. FORSYTH, Brian J. HICKMANN, Jonathan C. HALL, Christopher J. HUGHES
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Patent number: 11003455Abstract: According to one embodiment, a processor includes an instruction decoder to decode a first instruction to gather data elements from memory, the first instruction having a first operand specifying a first storage location and a second operand specifying a first memory address storing a plurality of data elements. The processor further includes an execution unit coupled to the instruction decoder, in response to the first instruction, to read contiguous a first and a second of the data elements from a memory location based on the first memory address indicated by the second operand, and to store the first data element in a first entry of the first storage location and a second data element in a second entry of a second storage location corresponding to the first entry of the first storage location.Type: GrantFiled: April 29, 2019Date of Patent: May 11, 2021Assignee: Intel CorporationInventors: Andrew T. Forsyth, Brian J. Hickmann, Jonathan C. Hall, Christopher J. Hughes
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Patent number: 10460185Abstract: A system and method for roadside image tracing are described herein. The system includes a camera mounted on a vehicle configured to capture images of objects around the vehicle while driving along a route of a plurality of routes, and processing circuitry. The processing circuitry is configured to receive the captured images from the camera and vehicle parameters including speed, a fuel level, and a mileage, extract objects and locations of the objects within the captured images including information related to driving, determine a route ranking based on the information collected from the objects during one or more trips along each route of the plurality of routes, generate route options based on the route ranking and the vehicle parameters, and transmit route options to a display.Type: GrantFiled: January 30, 2018Date of Patent: October 29, 2019Assignee: TOYOTA MOTOR ENGINEERING & MANUFACTURING NORTH AMERICA, INC.Inventors: Jonathan C. Hall, Tomohiro Matsukawa
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Patent number: 10414275Abstract: An information display system includes a steering wheel including a ring portion and an upper opening region within the ring portion, an instrument cluster arrangement positioned forward of the steering wheel, and an electronic control unit. The instrument cluster arrangement includes a first gauge having a first fixing member on a portion of a boundary of the first gauge, and a second gauge having a second fixing member on a portion of a boundary of the second gauge. The first fixing member and the second fixing member are configured to hold a handheld device placed between the first and second gauges, and the first and second gauges are positioned such that when the handheld device is placed between the first and second gauges the handheld device is visible through the upper opening region.Type: GrantFiled: March 4, 2019Date of Patent: September 17, 2019Assignee: TOYOTA MOTOR ENGINEERING & MANUFACTURING NORTH AMERICA, INC.Inventor: Jonathan C. Hall
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Patent number: 10387151Abstract: Methods and apparatus are disclosed for accessing multiple data cache lines for scatter/gather operations. Embodiment of apparatus may comprise address generation logic to generate an address from an index of a set of indices for each of a set of corresponding mask elements having a first value. Line or bank match ordering logic matches addresses in the same cache line or different banks, and orders an access sequence to permit a group of addresses in multiple cache lines and different banks. Address selection logic directs the group of addresses to corresponding different banks in a cache to access data elements in multiple cache lines corresponding to the group of addresses in a single access cycle. A disassembly/reassembly buffer orders the data elements according to their respective bank/register positions, and a gather/scatter finite state machine changes the values of corresponding mask elements from the first value to a second value.Type: GrantFiled: September 30, 2011Date of Patent: August 20, 2019Assignee: Intel CorporationInventors: Jonathan C. Hall, Sailesh Kottapalli, Andrew T. Forsyth
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Publication number: 20190250921Abstract: According to one embodiment, a processor includes an instruction decoder to decode a first instruction to gather data elements from memory, the first instruction having a first operand specifying a first storage location and a second operand specifying a first memory address storing a plurality of data elements. The processor further includes an execution unit coupled to the instruction decoder, in response to the first instruction, to read contiguous a first and a second of the data elements from a memory location based on the first memory address indicated by the second operand, and to store the first data element in a first entry of the first storage location and a second data element in a second entry of a second storage location corresponding to the first entry of the first storage location.Type: ApplicationFiled: April 29, 2019Publication date: August 15, 2019Inventors: Andrew T. FORSYTH, Brian J. HICKMANN, Jonathan C. HALL, Christopher J. HUGHES
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Publication number: 20190236382Abstract: A system and method for roadside image tracing are described herein. The system includes a camera mounted on a vehicle configured to capture images of objects around the vehicle while driving along a route of a plurality of routes, and processing circuitry. The processing circuitry is configured to receive the captured images from the camera and vehicle parameters including speed, a fuel level, and a mileage, extract objects and locations of the objects within the captured images including information related to driving, determine a route ranking based on the information collected from the objects during one or more trips along each route of the plurality of routes, generate route options based on the route ranking and the vehicle parameters, and transmit route options to a display.Type: ApplicationFiled: January 30, 2018Publication date: August 1, 2019Applicant: Toyota Motor Engineering & Manufacturing North America, Inc.Inventors: Jonathan C. HALL, Tomohiro Matsukawa
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Publication number: 20190193561Abstract: An information display system includes a steering wheel including a ring portion and an upper opening region within the ring portion, an instrument cluster arrangement positioned forward of the steering wheel, and an electronic control unit. The instrument cluster arrangement includes a first gauge having a first fixing member on a portion of a boundary of the first gauge, and a second gauge having a second fixing member on a portion of a boundary of the second gauge. The first fixing member and the second fixing member are configured to hold a handheld device placed between the first and second gauges, and the first and second gauges are positioned such that when the handheld device is placed between the first and second gauges the handheld device is visible through the upper opening region.Type: ApplicationFiled: March 4, 2019Publication date: June 27, 2019Applicant: Toyota Motor Engineering & Manufacturing North America, Inc.Inventor: Jonathan C. Hall
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Patent number: 10317909Abstract: Provided is a method and device for positioning a vehicle attachment point in a vehicle environment. On retrieving a plurality of object parameters relating to an object, a determination is made for a vehicle distance value relative to the vehicle attachment point in order to accommodate an object distance parameter that was retrieved from the plurality of object parameters. A vehicle environment assessment is then made relating to accommodating the physical characteristics of the object and the vehicle associated with the vehicle attachment point. Based on the assessment, vehicle attachment point positional data may be generated for positioning the vehicle attachment point relative to a vehicle environment based on at least the object distance parameter and the vehicle distance value.Type: GrantFiled: December 16, 2016Date of Patent: June 11, 2019Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.Inventors: Kameron R. Hurst, Jonathan C. Hall, Cassandra R. Grant, Frankie B. Reed
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Patent number: 10275257Abstract: According to one embodiment, a processor includes an instruction decoder to decode a first instruction to gather data elements from memory, the first instruction having a first operand specifying a first storage location and a second operand specifying a first memory address storing a plurality of data elements. The processor further includes an execution unit coupled to the instruction decoder, in response to the first instruction, to read contiguous a first and a second of the data elements from a memory location based on the first memory address indicated by the second operand, and to store the first data element in a first entry of the first storage location and a second data element in a second entry of a second storage location corresponding to the first entry of the first storage location.Type: GrantFiled: May 22, 2017Date of Patent: April 30, 2019Assignee: Intel CorporationInventors: Andrew T. Forsyth, Brian J. Hickmann, Jonathan C. Hall, Christopher J. Hughes
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Patent number: 10175990Abstract: According to a first aspect, efficient data transfer operations can be achieved by: decoding by a processor device, a single instruction specifying a transfer operation for a plurality of data elements between a first storage location and a second storage location; issuing the single instruction for execution by an execution unit in the processor; detecting an occurrence of an exception during execution of the single instruction; and in response to the exception, delivering pending traps or interrupts to an exception handler prior to delivering the exception.Type: GrantFiled: May 20, 2013Date of Patent: January 8, 2019Assignee: Intel CorporationInventors: Christopher J. Hughes, Yen-Kuang (Y. K.) Chen, Mayank Bomb, Jason W. Brandt, Mark J. Buxton, Mark J. Charney, Srinivas Chennupaty, Jesus Corbal, Martin G. Dixon, Milind B. Girkar, Jonathan C. Hall, Hideki (Saito) Ido, Peter Lachner, Gilbert Neiger, Chris J. Newburn, Rajesh S. Parthasarathy, Bret L. Toll, Robert Valentine, Jeffrey G. Wiedemeier
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Patent number: 10133577Abstract: A processor includes an instruction schedule and dispatch (schedule/dispatch) unit to receive a single instruction multiple data (SIMD) instruction to perform an operation on multiple data elements stored in a storage location indicated by a first source operand. The instruction schedule/dispatch unit is to determine a first of the data elements that will not be operated to generate a result written to a destination operand based on a second source operand. The processor further includes multiple processing elements coupled to the instruction schedule/dispatch unit to process the data elements of the SIMD instruction in a vector manner, and a power management unit coupled to the instruction schedule/dispatch unit to reduce power consumption of a first of the processing elements configured to process the first data element.Type: GrantFiled: December 19, 2012Date of Patent: November 20, 2018Assignee: Intel CorporationInventors: Jesus Corbal, Dennis R. Bradford, Jonathan C. Hall, Thomas D. Fletcher, Brian J. Hickmann, Dror Markovich, Amit Gradstein
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Patent number: 10114651Abstract: According to a first aspect, efficient data transfer operations can be achieved by: decoding by a processor device, a single instruction specifying a transfer operation for a plurality of data elements between a first storage location and a second storage location; issuing the single instruction for execution by an execution unit in the processor; detecting an occurrence of an exception during execution of the single instruction; and in response to the exception, delivering pending traps or interrupts to an exception handler prior to delivering the exception.Type: GrantFiled: January 4, 2018Date of Patent: October 30, 2018Assignee: Intel CorporationInventors: Christopher J. Hughes, Yen-Kuang (Y. K.) Chen, Mayank Bomb, Jason W. Brandt, Mark J. Buxton, Mark J. Charney, Srinivas Chennupaty, Jesus Corbal, Martin G. Dixon, Milind B. Girkar, Jonathan C. Hall, Hideki (Saito) Ido, Peter Lachner, Gilbert Neiger, Chris J. Newburn, Rajesh S. Parthasarathy, Bret L. Toll, Robert Valentine, Jeffrey G. Wiedemeier
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Patent number: 10007620Abstract: A processor includes a set associative cache and a cache controller. The cache controller makes an initial association between first and second groups of sampled sets in the cache and first and second cache replacement policies. Follower sets in the cache are initially associated with the more conservative of the two policies. Following cache line insertions in a first epoch, the associations between the groups of sampled sets and cache replacement policies are swapped for the next epoch. If the less conservative policy outperforms the more conservative policy during two consecutive epochs, the follower sets are associated with the less conservative policy for the next epoch. Subsequently, if the more conservative policy outperforms the less conservative policy during any epoch, the follower sets are again associated with the more conservative policy. Performance may be measured based the number of cache misses associated with each policy.Type: GrantFiled: September 30, 2016Date of Patent: June 26, 2018Assignee: Intel CorporationInventors: Seth H. Pugsley, Christopher B. Wilkerson, Roger Gramunt, Jonathan C. Hall, Prabhat Jain
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Publication number: 20180173241Abstract: Provided is a method and device for positioning a vehicle attachment point in a vehicle environment. On retrieving a plurality of object parameters relating to an object, a determination is made for a vehicle distance value relative to the vehicle attachment point in order to accommodate an object distance parameter that was retrieved from the plurality of object parameters. A vehicle environment assessment is then made relating to accommodating the physical characteristics of the object and the vehicle associated with the vehicle attachment point. Based on the assessment, vehicle attachment point positional data may be generated for positioning the vehicle attachment point relative to a vehicle environment based on at least the object distance parameter and the vehicle distance value.Type: ApplicationFiled: December 16, 2016Publication date: June 21, 2018Inventors: Kameron R. Hurst, Jonathan C. Hall, Cassandra R. Grant, Frankie B. Reed
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Publication number: 20180150301Abstract: According to a first aspect, efficient data transfer operations can be achieved by: decoding by a processor device, a single instruction specifying a transfer operation for a plurality of data elements between a first storage location and a second storage location; issuing the single instruction for execution by an execution unit in the processor; detecting an occurrence of an exception during execution of the single instruction; and in response to the exception, delivering pending traps or interrupts to an exception handler prior to delivering the exception.Type: ApplicationFiled: May 20, 2013Publication date: May 31, 2018Inventors: Christopher J. Hughes, Yen-Kuang (Y.K.) Chen, Mayank Bomb, Jason W. Brandt, Mark J. Buxton, Mark J. Charney, Srinivas Chennupaty, Jesus Corbal, Martin G. Dixon, Milind B. Girkar, Jonathan C. Hall, Hideki (Saito) Ido, Peter Lachner, Gilbert Neiger, Chris J. Newburn, Rajesh S. Parthasarathy, Bret L. Toll, Robert Valentine, Jeffrey G. Wiedemeier
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Publication number: 20180129506Abstract: According to a first aspect, efficient data transfer operations can be achieved by: decoding by a processor device, a single instruction specifying a transfer operation for a plurality of data elements between a first storage location and a second storage location; issuing the single instruction for execution by an execution unit in the processor; detecting an occurrence of an exception during execution of the single instruction; and in response to the exception, delivering pending traps or interrupts to an exception handler prior to delivering the exception.Type: ApplicationFiled: January 4, 2018Publication date: May 10, 2018Inventors: Christopher J. Hughes, Yen-Kuang (Y.K.) Chen, Mayank Bomb, Jason W. Brandt, Mark J. Buxton, Mark J. Charney, Srinivas Chennupaty, Jesus Corbal, Martin G. Dixon, Milind B. Girkar, Jonathan C. Hall, Hideki (Saito) Ido, Peter Lachner, Gilbert Neiger, Chris J. Newburn, Rajesh S. Parthasarathy, Bret L. Toll, Robert Valentine, Jeffrey G. Wiedemeier
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Publication number: 20180095895Abstract: A processor includes a set associative cache and a cache controller. The cache controller makes an initial association between first and second groups of sampled sets in the cache and first and second cache replacement policies. Follower sets in the cache are initially associated with the more conservative of the two policies. Following cache line insertions in a first epoch, the associations between the groups of sampled sets and cache replacement policies are swapped for the next epoch. If the less conservative policy outperforms the more conservative policy during two consecutive epochs, the follower sets are associated with the less conservative policy for the next epoch. Subsequently, if the more conservative policy outperforms the less conservative policy during any epoch, the follower sets are again associated with the more conservative policy. Performance may be measured based the number of cache misses associated with each policy.Type: ApplicationFiled: September 30, 2016Publication date: April 5, 2018Inventors: Seth H. Pugsley, Christopher B. Wilkerson, Roger Gramunt, Jonathan C. Hall, Prabhat Jain