Patents by Inventor Jonathan David Short
Jonathan David Short has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9960124Abstract: In certain embodiments, a mixed signal integrated circuit is provided that includes both a digital portion and an analog portion. A shield is provided that overlays one of the digital portion or the analog portion of the mixed signal integrated circuit. The shield limits propagation of signals between the digital portion and the analog portion of the mixed signal integrated circuit.Type: GrantFiled: October 23, 2013Date of Patent: May 1, 2018Assignee: GENERAL ELECTRIC COMPANYInventors: James Wilson Rose, Oliver Richard Astley, Donna Marie Sherman, Jonathan David Short
-
Patent number: 9754981Abstract: Embodiments of a solid state photomultiplier are provided herein. In some embodiments, a solid state photomultiplier may include an epitaxial layer, a high voltage region formed in the epitaxial layer, a low voltage region formed in the epitaxial layer, and an intermediate region disposed between the high voltage region and low voltage region, wherein the high voltage region is electrically coupled to the low voltage region via the intermediate region, and wherein at least a portion of the epitaxial layer is disposed between the high voltage region and intermediate region and between the low voltage region and the intermediate region.Type: GrantFiled: March 22, 2016Date of Patent: September 5, 2017Assignee: General Electric CompanyInventors: Jianjun Guo, Sergei Ivanovich Dolinsky, Jonathan David Short
-
Patent number: 9689996Abstract: Improved imaging systems are disclosed. More particularly, the present disclosure provides for an improved image sensor assembly for an imaging system, the image sensor assembly having an integrated photodetector array and its associated data acquisition electronics fabricated on the same substrate. By integrating the electronics on the same substrate as the photodetector array, this thereby reduces fabrications costs, and reduces interconnect complexity. Since both the photodiode contacts and the associated electronics are on the same substrate/plane, this thereby substantially eliminates certain expensive/time-consuming processing techniques. Moreover, the co-location of the electronics next to or proximal to the photodetector array provides for a much finer resolution detector assembly since the interconnect bottleneck between the electronics and the photodetector array is substantially eliminated/reduced.Type: GrantFiled: April 5, 2013Date of Patent: June 27, 2017Assignee: General Electric CompanyInventors: Naresh Kesavan Rao, James Wilson Rose, Christopher David Unger, Abdelaziz Ikhlef, Jonathan David Short
-
Patent number: 9588240Abstract: An imager tile including four-side buttable sub-imager pixel arrays with on-chip digitizing electronic readout circuit. Pixel groupings formed from among the plurality of imagers. Readout electronics including a buffer amplifier for each of the pixel groupings are connected to respective outputs of buttable imagers. Shared analog front ends connect to respective buffer amplifiers of pixel groupings. An analog-to-digital converter at a common centroid location relative to the shared analog front ends includes three data lines—selection input/output line to individually select an output, a clock input line, and a shared digital output line. A pixel output from a respective buffer amplifier is addressable by data provided on the selection input/output line, and the pixel output is provided on the shared digital output line. The I/O lines connected to a programmable logic device where the imager serial data input is output as a massively parallel data stream.Type: GrantFiled: October 27, 2015Date of Patent: March 7, 2017Assignee: General Electric CompanyInventors: Ibrahim Issoufou Kouada, Brian David Yanoff, Jonathan David Short, Jianjun Guo, Biju Jacob
-
Patent number: 9571765Abstract: An imager including sub-imager pixel arrays having a plurality of four-side buttable imagers distributed on a substrate and an on-chip digitizing readout circuit. Pixel groupings formed from among the plurality of four-side buttable imagers. The readout electronics including a buffer amplifier for each of the pixel groupings and connected to respective outputs of each four-side buttable imager of the pixel grouping. A plurality of shared analog front ends, each shared analog front end connected to respective multiple buffer amplifiers from among the plurality of pixel groupings. An analog-to-digital converter located at a common centroid location relative to the plurality of shared analog front ends, the analog-to-digital converter having a fully addressable input selection to individually select an output from each of the plurality of shared analog front ends. An output of the analog-to-digital converter connected to a trace on a back surface of the wafer substrate by a through-substrate-via.Type: GrantFiled: June 25, 2015Date of Patent: February 14, 2017Assignee: General Electric CompanyInventors: Jianjun Guo, Brian David Yanoff, Jonathan David Short, Biju Jacob
-
Patent number: 9568620Abstract: Embodiments of a solid state photomultiplier are provided herein. In some embodiments, a photosensor may include a sensing element; and readout electronics, wherein the sensing element is AC coupled to the readout electronics. In some embodiments, a solid state photomultipler may include a microcell having; a sensing element; and readout electronics, wherein the sensing element is AC coupled to the readout electronics.Type: GrantFiled: September 11, 2015Date of Patent: February 14, 2017Assignee: General Electric CompanyInventors: JianJun Guo, Sergei Ivanovich Dolinsky, David Leo McDaniel, Jonathan David Short
-
Publication number: 20160381311Abstract: An imager including sub-imager pixel arrays having a plurality of four-side buttable imagers distributed on a substrate and an on-chip digitizing readout circuit. Pixel groupings formed from among the plurality of four-side buttable imagers. The readout electronics including a buffer amplifier for each of the pixel groupings and connected to respective outputs of each four-side buttable imager of the pixel grouping. A plurality of shared analog front ends, each shared analog front end connected to respective multiple buffer amplifiers from among the plurality of pixel groupings. An analog-to-digital converter located at a common centroid location relative to the plurality of shared analog front ends, the analog-to-digital converter having a fully addressable input selection to individually select an output from each of the plurality of shared analog front ends. An output of the analog-to-digital converter connected to a trace on a back surface of the wafer substrate by a through-substrate-via.Type: ApplicationFiled: June 25, 2015Publication date: December 29, 2016Inventors: Jianjun Guo, Brian David Yanoff, Jonathan David Short, Biju Jacob
-
Patent number: 9525852Abstract: An embedded imaging system in one embodiment includes an encoding module, an imaging module, and a cable. The encoding module is disposed proximate to a proximal end of the system, and is configured to encode frame synchronizing information into timing information comprising a reference clock. The imaging module is disposed proximate the distal end, and includes an image capture device configured to obtain imaging information and a decoding module. The decoding control module is configured to obtain the timing information, to decode the timing information to obtain recovered frame synchronizing information, and to control the image capture device using the recovered frame synchronizing information. The cable is interposed between the proximal end and the distal end, and is configured for passage therethrough of the timing information and the imaging information.Type: GrantFiled: August 2, 2013Date of Patent: December 20, 2016Assignee: General Electric CompanyInventors: Robert Gideon Wodnicki, Sora Kim, Ansas Matthias Kasten, Kevin Coombs, Clark Alexander Bendall, Jonathan David Short
-
Publication number: 20160358957Abstract: Embodiments of a solid state photomultiplier are provided herein. In some embodiments, a solid state photomultiplier may include an epitaxial layer, a high voltage region formed in the epitaxial layer, a low voltage region formed in the epitaxial layer, and an intermediate region disposed between the high voltage region and low voltage region, wherein the high voltage region is electrically coupled to the low voltage region via the intermediate region, and wherein at least a portion of the epitaxial layer is disposed between the high voltage region and intermediate region and between the low voltage region and the intermediate region.Type: ApplicationFiled: March 22, 2016Publication date: December 8, 2016Inventors: Jianjun Guo, Sergei Ivanovich Dolinsky, Jonathan David Short
-
Patent number: 9337233Abstract: Embodiments of a photodiode array are provided herein. In some embodiments, a photodiode array may include a semiconductor layer configured to convert photons into analog electrical signals; and a passive layer having a first surface and a second surface disposed opposite the first surface, wherein the semiconductor layer is coupled to the first surface, and wherein the passive layer is configured to have a signal receiving component coupled directly to the second surface of the passive layer.Type: GrantFiled: December 15, 2014Date of Patent: May 10, 2016Assignee: General Electric CompanyInventors: Sabarni Palit, James Wilson Rose, Peter Micah Sandvik, Jonathan David Short, Ching-Yeu Wei, Xingguang Zhu
-
Publication number: 20160084970Abstract: Embodiments of a solid state photomultiplier are provided herein. In some embodiments, a photosensor may include a sensing element; and readout electronics, wherein the sensing element is AC coupled to the readout electronics. In some embodiments, a solid state photomultipler may include a microcell having; a sensing element; and readout electronics, wherein the sensing element is AC coupled to the readout electronics.Type: ApplicationFiled: September 11, 2015Publication date: March 24, 2016Inventors: JianJun Guo, Sergei Ivanovich Dolinsky, David Leo McDaniel, Jonathan David Short
-
Publication number: 20150108357Abstract: In certain embodiments, a mixed signal integrated circuit is provided that includes both a digital portion and an analog portion. A shield is provided that overlays one of the digital portion or the analog portion of the mixed signal integrated circuit. The shield limits propagation of signals between the digital portion and the analog portion of the mixed signal integrated circuit.Type: ApplicationFiled: October 23, 2013Publication date: April 23, 2015Applicant: General Electric CompanyInventors: James Wilson Rose, Oliver Richard Astley, Donna Marie Sherman, Jonathan David Short
-
Publication number: 20150035967Abstract: An embedded imaging system in one embodiment includes an encoding module, an imaging module, and a cable. The encoding module is disposed proximate to a proximal end of the system, and is configured to encode frame synchronizing information into timing information comprising a reference clock. The imaging module is disposed proximate the distal end, and includes an image capture device configured to obtain imaging information and a decoding module. The decoding control module is configured to obtain the timing information, to decode the timing information to obtain recovered frame synchronizing information, and to control the image capture device using the recovered frame synchronizing information. The cable is interposed between the proximal end and the distal end, and is configured for passage therethrough of the timing information and the imaging information.Type: ApplicationFiled: August 2, 2013Publication date: February 5, 2015Applicant: General Electric CompanyInventors: Robert Gideon Wodnicki, Sora Kim, Ansas Matthias Kasten, Kevin Coombs, Clark Alexander Bendall, Jonathan David Short
-
Publication number: 20140301534Abstract: Improved imaging systems are disclosed. More particularly, the present disclosure provides for an improved image sensor assembly for an imaging system, the image sensor assembly having an integrated photodetector array and its associated data acquisition electronics fabricated on the same substrate. By integrating the electronics on the same substrate as the photodetector array, this thereby reduces fabrications costs, and reduces interconnect complexity. Since both the photodiode contacts and the associated electronics are on the same substrate/plane, this thereby substantially eliminates certain expensive/time-consuming processing techniques. Moreover, the co-location of the electronics next to or proximal to the photodetector array provides for a much finer resolution detector assembly since the interconnect bottleneck between the electronics and the photodetector array is substantially eliminated/reduced.Type: ApplicationFiled: April 5, 2013Publication date: October 9, 2014Applicant: General Electric CompanyInventors: Naresh Kesavan Rao, James Wilson Rose, Christopher David Unger, Abdelaziz Ikhlef, Jonathan David Short
-
Patent number: 8575558Abstract: A method for forming a sensor stack is presented. The method includes providing a substrate having a first side and a second side. Furthermore, the method includes disposing an integrated circuit having a first side and a second side on the first side of the substrate, where the integrated circuit comprises a first plurality of contact pads disposed on the first side of the integrated circuit. The method also includes providing a sensor array having a plurality of sensor elements, wherein each of the sensor elements has a first side and a second side, and wherein the sensor array comprises a second plurality of contact pads disposed on the second side of the sensor array.Type: GrantFiled: November 30, 2010Date of Patent: November 5, 2013Assignee: General Electric CompanyInventors: John Eric Tkaczyk, James Wilson Rose, Jonathan David Short, Charles Gerard Woychik
-
Patent number: 8564086Abstract: An apparatus for reducing photodiode thermal gain coefficient includes a bulk semiconductor material having a light-illumination side. The bulk semiconductor material includes a minority charge carrier diffusion length property configured to substantially match a predetermined hole diffusion length value and a thickness configured to substantially match a predetermined photodiode layer thickness. The apparatus also includes a dead layer coupled to the light-illumination side of the bulk semiconductor material, the dead layer having a thickness configured to substantially match a predetermined thickness value and wherein an absolute value of a thermal coefficient of gain due to the minority carrier diffusion length property of the bulk semiconductor material is configured to substantially match an absolute value of a thermal coefficient of gain due to the thickness of the dead layer.Type: GrantFiled: March 29, 2013Date of Patent: October 22, 2013Assignee: General Electric CompanyInventors: Wen Li, Jonathan David Short, George Edward Possin
-
Publication number: 20130230134Abstract: An apparatus for reducing photodiode thermal gain coefficient includes a bulk semiconductor material having a light-illumination side. The bulk semiconductor material includes a minority charge carrier diffusion length property configured to substantially match a predetermined hole diffusion length value and a thickness configured to substantially match a predetermined photodiode layer thickness. The apparatus also includes a dead layer coupled to the light-illumination side of the bulk semiconductor material, the dead layer having a thickness configured to substantially match a predetermined thickness value and wherein an absolute value of a thermal coefficient of gain due to the minority carrier diffusion length property of the bulk semiconductor material is configured to substantially match an absolute value of a thermal coefficient of gain due to the thickness of the dead layer.Type: ApplicationFiled: March 29, 2013Publication date: September 5, 2013Applicant: GENERAL ELECTRIC COMPANYInventors: Wen Li, Jonathan David Short, George Edward Possin
-
Patent number: 8247778Abstract: A scintillator array and method for making the same are provided. The array comprises a bi-layer reflector further comprising a conformal smoothing layer and a mirror layer. The bi-layer reflector does not comprise an intervening reducing agent or adhesion layer and/or comprises aluminum. Further, the mirror layer may be deposited via gas phase metallization, allowing application to tightly confined spaces. A detector array comprising the scintillator array is also provided.Type: GrantFiled: June 30, 2010Date of Patent: August 21, 2012Assignee: General Electric CompanyInventors: Kevin Paul McEvoy, James Wilson Rose, Andrea Jeanne Howard, Michael James Palleschi, Jonathan David Short
-
Publication number: 20120133054Abstract: A method for forming a sensor stack is presented. The method includes providing a substrate having a first side and a second side. Furthermore, the method includes disposing an integrated circuit having a first side and a second side on the first side of the substrate, where the integrated circuit comprises a first plurality of contact pads disposed on the first side of the integrated circuit. The method also includes providing a sensor array having a plurality of sensor elements, wherein each of the sensor elements has a first side and a second side, and wherein the sensor array comprises a second plurality of contact pads disposed on the second side of the sensor array.Type: ApplicationFiled: November 30, 2010Publication date: May 31, 2012Applicant: GENERAL ELECTRIC COMPANYInventors: John Eric Tkaczyk, James Wilson Rose, Jonathan David Short, Charles Gerard Woychik
-
Publication number: 20120001078Abstract: A scintillator array and method for making the same are provided. The array comprises a bi-layer reflector further comprising a conformal smoothing layer and a mirror layer. The bi-layer reflector does not comprise an intervening reducing agent or adhesion layer and/or comprises aluminum. Further, the mirror layer may be deposited via gas phase metallization, allowing application to tightly confined spaces. A detector array comprising the scintillator array is also provided.Type: ApplicationFiled: June 30, 2010Publication date: January 5, 2012Applicant: GENERAL ELECTRIC COMPANYInventors: Kevin Paul McEvoy, James Wilson Rose, Andrea Jeanne Howard, Michael James Palleschi, Jonathan David Short