Abstract: An integrated circuit has a signal path including a first circuit that introduces a propagation delay that decreases with circuit conditions and process speed in series with a second circuit that introduces a propagation delay that increases with circuit conditions and process speed. The circuit conditions and process speed are sensed and the duration of the propagation delay of the second circuit varied such that the total propagation delay remains within a predetermined range over circuit condition and process speed variations. In another embodiment of the invention, a current source develops a bias current to control the duration of the propagation delay of the second circuit. In yet another embodiment of the invention the current source is a current mirror.

Abstract: A method of switching a switched-capacitor circuit to reduce signal-dependent distortion resulting from the switching operation. Two single-pole, double-throw switches in the array, having the switched capacitor coupling between to the common terminals thereof, are alternately switched without the use of an intermediate (no-make) state.