Patents by Inventor Jonathan Q. Tu

Jonathan Q. Tu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10684794
    Abstract: In a memory system having a storage controller and a plurality of distinct sets of non-volatile memory devices, each respective channel controller of a plurality of channel controllers, each channel controller corresponding to a distinct set of the plurality of distinct sets of non-volatile memory devices, determines a backlog of the respective channel controller in accordance with pending commands in one or more command queues, receives power credits allocated by the storage controller, based at least in part on the backlog of the respective channel controller, and while executing commands in the one or more command queues, limits execution of said commands in accordance with the received power credits. For example, limiting execution includes deferring execution of a respective command in accordance with a determination that executing the respective command would require power credits in excess of power credits available in the respective channel controller.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: June 16, 2020
    Assignee: SanDisk Technologies LLC
    Inventors: Reed P. Tidwell, Steven T. Sprouse, Satish B. Vasudeva, James M. Higgins, Jonathan Q. Tu
  • Patent number: 10509591
    Abstract: In a memory system having a storage controller and a plurality of distinct sets of non-volatile memory devices, each respective channel controller of a plurality of channel controllers, each channel controller corresponding to a distinct set of the plurality of distinct sets of non-volatile memory devices, receives power credits allocated by the storage controller, including an average power credit and a peak power credit; and while executing commands in the one or more command queues, limits execution of said commands in accordance with the received average power credit and the received peak power credit. In some embodiments, a total number of average power credits allocated by the storage controller is variable and a total number of peak power credits allocated by the storage controller is fixed.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: December 17, 2019
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Reed P. Tidwell, Steven T. Sprouse, Satish B. Vasudeva, James M. Higgins, Jonathan Q. Tu
  • Publication number: 20180335977
    Abstract: In a memory system having a storage controller and a plurality of distinct sets of non-volatile memory devices, each respective channel controller of a plurality of channel controllers, each channel controller corresponding to a distinct set of the plurality of distinct sets of non-volatile memory devices, determines a backlog of the respective channel controller in accordance with pending commands in one or more command queues, receives power credits allocated by the storage controller, based at least in part on the backlog of the respective channel controller, and while executing commands in the one or more command queues, limits execution of said commands in accordance with the received power credits. For example, limiting execution includes deferring execution of a respective command in accordance with a determination that executing the respective command would require power credits in excess of power credits available in the respective channel controller.
    Type: Application
    Filed: July 12, 2017
    Publication date: November 22, 2018
    Inventors: Reed P. Tidwell, Steven T. Sprouse, Satish B. Vasudeva, James M. Higgins, Jonathan Q. Tu
  • Publication number: 20180335978
    Abstract: In a memory system having a storage controller and a plurality of distinct sets of non-volatile memory devices, each respective channel controller of a plurality of channel controllers, each channel controller corresponding to a distinct set of the plurality of distinct sets of non-volatile memory devices, receives power credits allocated by the storage controller, including an average power credit and a peak power credit; and while executing commands in the one or more command queues, limits execution of said commands in accordance with the received average power credit and the received peak power credit. In some embodiments, a total number of average power credits allocated by the storage controller is variable and a total number of peak power credits allocated by the storage controller is fixed.
    Type: Application
    Filed: July 12, 2017
    Publication date: November 22, 2018
    Inventors: Reed P. Tidwell, Steven T. Sprouse, Satish B. Vasudeva, James M. Higgins, Jonathan Q. Tu