Patents by Inventor Jonathon D. Mellott

Jonathon D. Mellott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for performing computations using residue arithmetic
    Patent number: 8965943
    Abstract: The subject invention pertains to a method and apparatus for performing computations using residue arithmetic. The subject method and apparatus can utilize logic gates for performing calculations such as multiplication by a constant, computing a number theoretic logarithm of a residue for a given base ?i and modulus pi, and computing the product of two residues, modulo pi. The use of logic gates can offer advantages when compared with the use of ROMs for table look-up functions in integrated RNS digital signal processor implementations.
    Type: Grant
    Filed: May 14, 2012
    Date of Patent: February 24, 2015
    Assignee: The Athena Group, Inc.
    Inventor: Jonathon D. Mellott
  • METHOD AND APPARATUS FOR PERFORMING COMPUTATIONS USING RESIDUE ARITHMETIC
    Publication number: 20120284319
    Abstract: The subject invention pertains to a method and apparatus for performing computations using residue arithmetic. The subject method and apparatus can utilize logic gates for performing calculations such as multiplication by a constant, computing a number theoretic logarithm of a residue for a given base ?i and modulus pi, and computing the product of two residues, modulo pi. The use of logic gates can offer advantages when compared with the use of ROMs for table look-up functions in integrated RNS digital signal processor implementations.
    Type: Application
    Filed: May 14, 2012
    Publication date: November 8, 2012
    Applicant: THE ATHENA GROUP, INC.
    Inventor: Jonathon D. Mellott
  • Method and apparatus for performing computations using residue arithmetic
    Patent number: 8180821
    Abstract: The subject invention pertains to a method and apparatus for performing computations using residue arithmetic. The subject method and apparatus can utilize logic gates for performing calculations such as multiplication by a constant, computing a number theoretic logarithm of a residue for a given base ?i and modulus pi and computing the product of two residues, modulo Pi- The use of logic gates can offer advantages when compared with the use of ROMs for table look-up functions in integrated RNS digital signal processor implementations.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: May 15, 2012
    Assignee: The Athena Group, Inc.
    Inventor: Jonathon D. Mellott
  • Method and Apparatus for Performing Computations Using Residue Arithmetic
    Publication number: 20100030832
    Abstract: The subject invention pertains to a method and apparatus for performing computations using residue arithmetic. The subject method and apparatus can utilize logic gates for performing calculations such as multiplication by a constant, computing a number theoretic logarithm of a residue for a given base ?i and modulus pi and computing the product of two residues, modulo Pi- The use of logic gates can offer advantages when compared with the use of ROMs for table look-up functions in integrated RNS digital signal processor implementations.
    Type: Application
    Filed: March 19, 2009
    Publication date: February 4, 2010
    Applicant: The Athena Group, Inc.
    Inventor: Jonathon D. Mellott
  • Method and apparatus for multiplication and/or modular reduction processing
    Patent number: 7607165
    Abstract: The subject invention relates to a method and apparatus for multiplication of numbers. In a specific embodiment, the subject invention can be used to perform sequential multiplication. The subject invention also pertains to a method and apparatus for modular reduction processing of a number or product of two numbers. In a specific embodiment, sequential multiplication can be incorporated to perform modular reduction processing. The subject method and apparatus can also be utilized for modular exponentiation of large numbers. In a specific embodiment, numbers larger than or equal to 2128 or even higher can be exponentiated. For example, the subject invention can be used for exponentiation of number as large as 21024, 22048, 24096, or even larger.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: October 20, 2009
    Assignee: The Athena Group, Inc.
    Inventors: Jonathon D. Mellott, Patrick Dennis Rugg
  • Method and apparatus for multiplication and/or modular reduction processing
    Publication number: 20020161810
    Abstract: The subject invention relates to a method and apparatus for multiplication of numbers. In a specific embodiment, the subject invention can be used to perform sequential multiplication. The subject invention also pertains to a method and apparatus for modular reduction processing of a number or product of two numbers. In a specific embodiment, sequential multiplication can be incorporated to perform modular reduction processing. The subject method and apparatus can also be utilized for modular exponentiation of large numbers. In a specific embodiment, numbers larger than or equal to 2128 or even higher can be exponentiated. For example, the subject invention can be used for exponentiation of number as large as 21024, 22048, 24096, or even larger.
    Type: Application
    Filed: March 11, 2002
    Publication date: October 31, 2002
    Inventors: Jonathon D. Mellott, Patrick Dennis Rugg