Patents by Inventor Jong-Bin MOON

Jong-Bin MOON has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11048364
    Abstract: A method for acquiring capacitance of a capacitive touch panel includes acquiring a selected capacitance value at a selected point among a plurality of points at which a plurality of capacitances are present, in the capacitive touch panel, determining the selected capacitance value as a reference capacitance value, and performing a multi-driving using a balanced code, and acquiring a capacitance value from at least one point among the plurality of points using the reference capacitance value.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: June 29, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong Jin Park, Min Gyu Kim, Sun Kwon Kim, Jong Bin Moon, Young Kil Choi, Yoon Kyung Choi
  • Publication number: 20200150795
    Abstract: A method for acquiring capacitance of a capacitive touch panel includes acquiring a selected capacitance value at a selected point among a plurality of points at which a plurality of capacitances are present, in the capacitive touch panel, determining the selected capacitance value as a reference capacitance value, and performing a multi-driving using a balanced code, and acquiring a capacitance value from at least one point among the plurality of points using the reference capacitance value.
    Type: Application
    Filed: August 23, 2019
    Publication date: May 14, 2020
    Inventors: YONG JIN PARK, MIN GYU KIM, SUN KWON KIM, JONG BIN MOON, YOUNG KIL CHOI, YOON KYUNG CHOI
  • Patent number: 9215352
    Abstract: A pixel clock generator is provided. The pixel clock generator includes a phase-locked-loop (PLL) circuit that generates, from an oscillation signal having a first frequency of tens of MHz, a multi-phase oscillation signal having a second frequency of several GHz; and a frequency/phase adjusting circuit that synchronizes the multi-phase oscillation signal with a horizontal sync signal to generate a first oscillation signal, frequency-divides the first oscillation signal to generate a second oscillation signal, and adjusts a phase of the second oscillation signal to generate the pixel clock.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: December 15, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kang-Yeop Choo, Do-Hyung Kim, Tae-Ik Kim, Jong-Bin Moon, Sang-Don Jung
  • Publication number: 20150062432
    Abstract: A pixel clock generator is provided. The pixel clock generator includes a phase-locked-loop (PLL) circuit that generates, from an oscillation signal having a first frequency of tens of MHz, a multi-phase oscillation signal having a second frequency of several GHz; and a frequency/phase adjusting circuit that synchronizes the multi-phase oscillation signal with a horizontal sync signal to generate a first oscillation signal, frequency-divides the first oscillation signal to generate a second oscillation signal, and adjusts a phase of the second oscillation signal to generate the pixel clock.
    Type: Application
    Filed: July 28, 2014
    Publication date: March 5, 2015
    Inventors: Kang-Yeop CHOO, Do-Hyung KIM, Tae-Ik KIM, Jong-Bin MOON, Sang-Don JUNG