Abstract: According to an aspect of the present disclosure, there is provided a substrate treating apparatus comprising: a vessel part having a substrate treatment region formed therein and including a supply port through which a treating fluid is supplied to the substrate treatment region and an exhaust port through which the treating fluid is exhausted from the substrate treatment region; a fluid supply unit configured to supply the treating fluid to the substrate treatment region; an exhaust unit configured to exhaust the treating fluid from the vessel part. The exhaust unit comprises: a main line connected to the exhaust port; an extension line branched from at least one of first and second nodes of the main line and including at least one of a first orifice or a first check valve to control an exhaust speed; and an auxiliary line branched from a third node of the main line, where an orifice and a check valve are not formed.

Abstract: The following description relates to an e-commerce system using content platform independent product broadcasting which combines a channel map for pay TV broadcasts provided over a broadcasting network with a channel map for product broadcasts provided over the Internet to thereby generate an integrated channel map. Using the integrated channel map, a user is able to easily connect to or change a product broadcast provided over the Internet with simple manipulation so as to perform an e-commerce transaction using content platform independent product broadcasting.

Abstract: The following description relates to an e-commerce system using content platform independent product broadcasting which combines a channel map for pay TV broadcasts provided over a broadcasting network with a channel map for product broadcasts provided over the Internet to thereby generate an integrated channel map. Using the integrated channel map, a user is able to easily connect to or change a product broadcast provided over the Internet with simple manipulation so as to perform an e-commerce transaction using content platform independent product broadcasting.

Abstract: A pretreatment apparatus for removing pith from cornstalks and separating husks therefrom includes a casing that receives cornstalks in a free-fall manner through an upper side thereof and allows the corn stalks to be discharged through a lower side thereof, and a rotor inserted into the casing and rotating inside the casing to hit cornstalk chips. The rotor includes a shaft inserted into the casing to be rotated by external force, a cover member holding the shaft so as to allow rotation of the shaft therein and connected to the entirety or part of an open upper side of the casing, and a hitting unit formed on a circumference of the shaft and hitting the corn stalks input into the casing.

Abstract: A method of synthesizing carbon nanotubes including forming a solution including an organometallic compound containing catalyst particles and a solvent, adding at least one support to the solution, wherein the carbon nanotubes are synthesized on a surface of the at least one support, and applying radiation to the solution to which the at least one support is added.

Abstract: Provided is an aluminum (Al) doped charge trap layer, a non-volatile memory device and methods of fabricating the same. The charge trap layer may include a plurality of silicon nano dots that trap charges and a silicon oxide layer that covers the silicon nano dots, wherein the charge trap layer is doped with aluminum (Al). The non-volatile memory device may include a substrate including a source and a drain on separate regions of the substrate, a tunneling film on the substrate contacting the source and the drain, the charge trap layer according to example embodiments, a blocking film on the charge trap layer, and a gate electrode on the blocking film.

Abstract: In one aspect, a method of fabricating a semiconductor device is provided. The method includes forming at least one capping layer over epitaxial source/drain regions of a PMOS device, forming a stress memorization (SM) layer over the PMOS device including the at least one capping layer and over an adjacent NMOS device, and treating the SM layer formed over the NMOS and PMOS devices to induce tensile stress in a channel region of the NMOS device.

Abstract: Provided is an aluminum (Al) doped charge trap layer, a non-volatile memory device and methods of fabricating the same. The charge trap layer may include a plurality of silicon nano dots that trap charges and a silicon oxide layer that covers the silicon nano dots, wherein the charge trap layer is doped with aluminum (Al). The non-volatile memory device may include a substrate including a source and a drain on separate regions of the substrate, a tunneling film on the substrate contacting the source and the drain, the charge trap layer according to example embodiments, a blocking film on the charge trap layer, and a gate electrode on the blocking film.

Abstract: Provided is an aluminum (Al) doped charge trap layer, a non-volatile memory device and methods of fabricating the same. The charge trap layer may include a plurality of silicon nano dots that trap charges and a silicon oxide layer that covers the silicon nano dots, wherein the charge trap layer is doped with aluminum (Al). The non-volatile memory device may include a substrate including a source and a drain on separate regions of the substrate, a tunneling film on the substrate contacting the source and the drain, the charge trap layer according to example embodiments, a blocking film on the charge trap layer, and a gate electrode on the blocking film.

Abstract: A phase change memory device and a method of manufacturing the phase change memory device are provided. The phase change memory device may include a switching element and a storage node connected to the switching element, wherein the storage node includes a bottom electrode and a top electrode, a phase change layer interposed between the bottom electrode and the top electrode, and a titanium-tellurium (Ti—Te)-based diffusion barrier layer interposed between the top electrode and the phase change layer. The Ti—Te based diffusion barrier layer may be a TixTe1?x layer wherein x may be greater than 0 and less than 0.5.

Abstract: A magnetic memory device includes a first magnetic layer having opposing sidewalls, a tunnel barrier layer on the first magnetic layer, the tunnel barrier layer having a top surface and having opposing sidewalls aligned with the opposing sidewalls of the first magnetic layer, and a second magnetic layer on the tunnel barrier layer, the second magnetic layer having a bottom surface that is narrower than the top surface of the tunnel barrier layer and opposing sidewalls that are spaced apart from the opposing sidewalls of the tunnel barrier layer. A conductive capping layer having opposing sidewalls aligned with the opposing sidewalls of the second magnetic layer is on the second magnetic layer.

Abstract: A phase-change random access memory (PRAM) device including a plurality of nanowires and a method of manufacturing the same include: a lower structure including a plurality of contact plugs; the nanowires extending into the contact plugs from surfaces defining a respective terminal end of the contact plugs; and a phase-change layer formed on top of the nanowires. Therefore, a reset or a set current consumed by the PRAM device is significantly reduced.

Abstract: A method for evaluating thin films comprises the steps of inputting measurement conditions, generating electron beams from an electron source to condense the electron beams to a specimen by a condenser lens, enlarging the electron beams transmitted by the specimen with imaging lenses to image an enlarged image of the specimen, acquiring elemental maps of the specimen with an element analyzer to display the acquired elemental maps, measuring a length of the elemental maps, and correcting the measurement conditions. Disclosed is an evaluating apparatus that implements the above evaluating method.

Abstract: Methods of forming a magnetic memory device include oxidizing a top magnetic layer using a conductive capping pattern as a mask. An etch selectivity between an oxidized portion of the top magnetic layer and a tunnel barrier layer may be relatively high. Using the tunnel barrier layer as an etch-stop layer, the oxidized portion of the top magnetic layer is selectively removed to form a top magnetic pattern, and to expose at least a portion of opposite sidewalls of the top magnetic pattern and the tunnel barrier layer. The unoxidized portion of the top magnetic layer forms a top magnetic pattern.

Abstract: In one aspect, a method of fabricating a semiconductor device is provided. The method includes forming at least one capping layer over epitaxial source/drain regions of a PMOS device, forming a stress memorization (SM) layer over the PMOS device including the at least one capping layer and over an adjacent NMOS device, and treating the SM layer formed over the NMOS and PMOS devices to induce tensile stress in a channel region of the NMOS device.

Abstract: Provided is an aluminum (Al) doped charge trap layer, a non-volatile memory device and methods of fabricating the same. The charge trap layer may include a plurality of silicon nano dots that trap charges and a silicon oxide layer that covers the silicon nano dots, wherein the charge trap layer is doped with aluminum (Al). The non-volatile memory device may include a substrate including a source and a drain on separate regions of the substrate, a tunneling film on the substrate contacting the source and the drain, the charge trap layer according to example embodiments, a blocking film on the charge trap layer, and a gate electrode on the blocking film.

Abstract: A phase change memory device and a method of manufacturing the phase change memory device are provided. The phase change memory device may include a switching element and a storage node connected to the switching element, wherein the storage node includes a bottom electrode and a top electrode, a phase change layer interposed between the bottom electrode and the top electrode, and a titanium-tellurium (Ti—Te)-based diffusion barrier layer interposed between the top electrode and the phase change layer. The Ti—Te based diffusion barrier layer may be a TixTe1-x layer wherein x may be greater than 0 and less than 0.5.

Abstract: A semiconductor device with a stack type capacitor having a lower electrode formed of an aluminum-doped metal, and a manufacturing method thereof are provided. The semiconductor device includes: a semiconductor substrate having a gate structure and an active region; an interlayer dielectric film formed on the active region; a lower electrode formed of a metal containing aluminum on the interlayer dielectric film; a dielectric layer formed on the lower electrode; an upper electrode formed on the dielectric layer; and a plug formed in the interlayer dielectric film to electrically connect the active region with the lower electrode.

Abstract: a phase-change random access memory (PRAM) device including a plurality of nanowires and a method of manufacturing the same include: a lower structure including a plurality of contact plugs; the nanowires extending into the contact plugs from surfaces defining a respective terminal end of the contact plugs; and a phase-change layer formed on top of the nanowires. Therefore, a reset or a set current consumed by the PRAM device is significantly reduced.

Abstract: An electron beam (EB) lithography method using a new material is provided. The method includes forming a thin layer using a Pb-based material; and patterning the thin layer by partially volatilizing the thin layer by irradiating electron beams. In this method, the thin layer formed of the Pb-based material is patterned using e-beams so that the linewidth of patterns formed on the thin layer can be greatly reduced.