Patents by Inventor Jong-Eo Oh

Jong-Eo Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method for reception in multi-input multi-output system
    Patent number: 8379748
    Abstract: Provided are an apparatus and method for reception in a MIMO system. An apparatus for calculating a signal weight, includes: at least two multiplexers configured to receive, a data stream corresponding to a weight inputted and multiplex the received data stream prior to output; a multiplexing control unit configured to control the outputs of the respective multiplexers and provide a clock of a predetermined rate and a clock of a double rate two times higher than the predetermined rate; a first multiplier configured to receive multiplexed data outputted from the respective multiplexers and multiply the multiplexed data; a first storage unit configured to latch the multiplication result of the first multiplier by the double-rate clock prior to output; an adder configured to add the output of the first storage unit and the output of the first multiplier; and a second storage unit configured to latch the addition.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: February 19, 2013
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Yu-Ro Lee, Minho Cheong, Jong-Eo Oh, Jeevon Choi, Sok-Kyu Lee
  • APPARATUS AND METHOD FOR RECEPTION IN MULTI-INPUT MULTI-OUTPUT SYSTEM
    Publication number: 20100150281
    Abstract: Provided are an apparatus and method for reception in a MIMO system. An apparatus for calculating a signal weight, includes: at least two multiplexers configured to receive, a data stream corresponding to a weight inputted and multiplex the received data stream prior to output; a multiplexing control unit configured to control the outputs of the respective multiplexers and provide a clock of a predetermined rate and a clock of a double rate two times higher than the predetermined rate; a first multiplier configured to receive multiplexed data outputted from the respective multiplexers and multiply the multiplexed data; a first storage unit configured to latch the multiplication result of the first multiplier by the double-rate clock prior to output; an adder configured to add the output of the first storage unit and the output of the first multiplier; and a second storage unit configured to latch the addition.
    Type: Application
    Filed: December 9, 2009
    Publication date: June 17, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yu-Ro LEE, Minho Cheong, Jong-Eo Oh, Jeevon Choi, Sok-Kyu Lee