Patents by Inventor Jong-Seok Bae

Jong-Seok Bae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240081404
    Abstract: Provided is a heater for an aerosol-generating device including a first electrically conductive pattern configured to perform heating and a second electrically conductive pattern arranged in parallel with the first electrically conductive pattern. The first electrically conductive pattern and/or the second electrically conductive pattern may include a material having a relatively small resistance temperature coefficient. Accordingly, a temperature increase rate of the heater may be greatly improved.
    Type: Application
    Filed: January 13, 2022
    Publication date: March 14, 2024
    Applicant: KT&G CORPORATION
    Inventors: Jong Seong JEONG, Gyoung Min GO, Hyung Jin BAE, Jang Won SEO, Chul Ho JANG, Min Seok JEONG, Jin Chul JUNG
  • Patent number: 10811182
    Abstract: An inductor includes a body in which is disposed a coil connecting a plurality of coil patterns by a via. The via includes a first conductive layer and a second conductive layer disposed on the first conductive layer, and the via has an upper portion having a transverse cross-sectional area that is greater than a transverse cross-sectional area of a lower portion thereof. An interlayer contact area of coils may be increased, thereby improving electrical characteristics and connection reliability.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: October 20, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Soo Yeol Kim, Jong Seok Bae, Se Woong Paeng
  • Patent number: 10629364
    Abstract: An inductor includes a body in which is disposed a coil formed as a plurality of coil patterns connected by one or more via(s). Each via includes a first conductive layer and a second conductive layer formed on the first conductive layer, and a distance between portions of coil patterns connected by the via in the body is greater than a distance between other portions of the coil patterns in the body. Methods of forming inductors having vias including first and second conductive layers are also provided.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: April 21, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Se Woong Paeng, Jong Seok Bae, Soo Yeol Kim
  • Patent number: 10468183
    Abstract: An inductor includes a body including a coil, the coil including a plurality of coil patterns connected by a via, is disposed, wherein the via includes a first conductive layer and a second conductive layer, formed on the first conductive layer, and the second conductive layer includes a conductive powder and an organic material.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: November 5, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Se Woong Paeng, Soo Hyun Lyoo, Jong Seok Bae
  • Patent number: 10455708
    Abstract: A multilayered substrate in accordance with an aspect of the present disclosure may include an insulating layer, a conductive pattern embedded, at least partially, in the insulating layer, and a bump being electrically connected to the conductive pattern and penetrating the insulating layer. The bump may include a low melting point metal layer having a melting point lower than a melting point of the conductive pattern and a high melting point metal layer having a melting point higher than the melting point of the low melting point metal layer and having a latitudinal cross-sectional area smaller than a latitudinal cross-sectional area of the low melting point metal layer.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: October 22, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seok-Hwan Ahn, Mi-Sun Hwang, Young-Gwan Ko, Jong-Seok Bae, Myung-Sam Kang
  • Publication number: 20180301277
    Abstract: An inductor includes a body in which is disposed a coil formed as a plurality of coil patterns connected by one or more via(s). Each via includes a first conductive layer and a second conductive layer formed on the first conductive layer, and a distance between portions of coil patterns connected by the via in the body is greater than a distance between other portions of the coil patterns in the body. Methods of forming inductors having vias including first and second conductive layers are also provided.
    Type: Application
    Filed: September 27, 2017
    Publication date: October 18, 2018
    Inventors: Se Woong PAENG, Jong Seok BAE, Soo Yeol KIM
  • Publication number: 20180122553
    Abstract: An inductor includes a body in which is disposed a coil connecting a plurality of coil patterns by a via. The via includes a first conductive layer and a second conductive layer disposed on the first conductive layer, and the via has an upper portion having a transverse cross-sectional area that is greater than a transverse cross-sectional area of a lower portion thereof. An interlayer contact area of coils may be increased, thereby improving electrical characteristics and connection reliability.
    Type: Application
    Filed: June 9, 2017
    Publication date: May 3, 2018
    Inventors: Soo Yeol KIM, Jong Seok BAE, Se Woong PAENG
  • Publication number: 20180070458
    Abstract: A multilayered substrate in accordance with an aspect of the present disclosure may include an insulating layer, a conductive pattern embedded, at least partially, in the insulating layer, and a bump being electrically connected to the conductive pattern and penetrating the insulating layer. The bump may include a low melting point metal layer having a melting point lower than a melting point of the conductive pattern and a high melting point metal layer having a melting point higher than the melting point of the low melting point metal layer and having a latitudinal cross-sectional area smaller than a latitudinal cross-sectional area of the low melting point metal layer.
    Type: Application
    Filed: November 13, 2017
    Publication date: March 8, 2018
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seok-Hwan AHN, Mi-Sun HWANG, Young-Gwan KO, Jong-Seok BAE, Myung-Sam KANG
  • Patent number: 9832866
    Abstract: A multilayered substrate includes unit substrates laminated in a direction of thickness thereof, and the unit substrates include a photosensitive insulating layer, a conductive pattern disposed in the photosensitive insulating layer, and a bump penetrating into the photosensitive insulating layer and providing an interlayer connection to the conductive pattern.
    Type: Grant
    Filed: June 29, 2016
    Date of Patent: November 28, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seok-Hwan Ahn, Mi-Sun Hwang, Young-Gwan Ko, Jong-Seok Bae, Myung-Sam Kang
  • Publication number: 20170200551
    Abstract: An inductor includes a body including a coil, the coil including a plurality of coil patterns connected by a via, is disposed, wherein the via includes a first conductive layer and a second conductive layer, formed on the first conductive layer, and the second conductive layer includes a conductive powder and an organic material.
    Type: Application
    Filed: September 26, 2016
    Publication date: July 13, 2017
    Inventors: Se Woong PAENG, Soo Hyun LYOO, Jong Seok BAE
  • Patent number: 9667204
    Abstract: A power amplification apparatus includes a multiple output bias voltage generation unit, a dynamic bias modulator, and a power amplifier. The multiple output bias voltage generation unit generates first and second bias voltages using an inductor coupled between an input voltage and a plurality of capacitors. The capacitors are connected to the inductor in a non-overlapping manner. The dynamic bias modulator outputs the first bias voltage or the second bias voltage as a variable bias voltage based on results of comparing voltage of an envelope signal of a radio frequency (RF) signal to an envelope reference voltage. The power amplifier is biased in response to the variable bias voltage, amplifies power of the RF signal, and outputs the amplified RF signal to an antenna.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: May 30, 2017
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Youngoo Yang, Jong Seok Bae, Sung Jae Oh, Soo Ho Cho
  • Publication number: 20170040955
    Abstract: A power amplification apparatus includes a multiple output bias voltage generation unit, a dynamic bias modulator, and a power amplifier. The multiple output bias voltage generation unit generates first and second bias voltages using an inductor coupled between an input voltage and a plurality of capacitors. The capacitors are connected to the inductor in a non-overlapping manner. The dynamic bias modulator outputs the first bias voltage or the second bias voltage as a variable bias voltage based on results of comparing voltage of an envelope signal of a radio frequency (RF) signal to an envelope reference voltage. The power amplifier is biased in response to the variable bias voltage, amplifies power of the RF signal, and outputs the amplified RF signal to an antenna.
    Type: Application
    Filed: May 3, 2016
    Publication date: February 9, 2017
    Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: Youngoo YANG, Jong Seok BAE, Sung Jae OH, Soo Ho CHO
  • Publication number: 20160381794
    Abstract: A multilayered substrate includes unit substrates laminated in a direction of thickness thereof, and the unit substrates include a photosensitive insulating layer, a conductive pattern disposed in the photosensitive insulating layer, and a bump penetrating into the photosensitive insulating layer and providing an interlayer connection to the conductive pattern.
    Type: Application
    Filed: June 29, 2016
    Publication date: December 29, 2016
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seok-Hwan AHN, Mi-Sun HWANG, Young-Gwan KO, Jong-Seok BAE, Myung-Sam KANG
  • Publication number: 20140185254
    Abstract: Disclosed herein is a printed circuit board including: a base substrate in which a connection pad is formed; a solder resist layer formed on the base substrate and comprising a trench exposing a surface of the base substrate; and a dam formed on the solder resist layer and burying the inside of the trench.
    Type: Application
    Filed: March 17, 2013
    Publication date: July 3, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jee Soo MOK, Jong Seok BAE, Soon Jin CHO, Duck Young MAENG
  • Patent number: 8151446
    Abstract: An apparatus for manufacturing a printed circuit board that uses conductive bumps to interconnect layers includes: a conveyor unit, which is configured to transport a board that has the conductive bumps formed on one side; an upper roller and a lower roller, which press the board and an insulator together; an elastic coating layer, formed on a surface of the upper roller; and a cleaning device, which removes impurities from a surface of the elastic coating layer. The apparatus does not require a separate device for performing a cushioning function and a detaching function between the bumps and the rollers, and the rollers can be kept clean using a cleaning device.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: April 10, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jee-Soo Mok, Je-Gwang Yoo, Yoong Oh, Jong-Seok Bae, Chang-Sup Ryu
  • Publication number: 20120043121
    Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes: an insulating layer; a first circuit layer including a first metal layer and a first plating layer provided on an outer side of the first metal layer and embedded in one surface of the insulating layer; a second circuit layer including a second metal layer and a second plating layer provided on an outer side of the second metal layer and embedded in the other surface of the insulating layer; and a bump interconnecting the first circuit layer and the second circuit layer while penetrating through the insulating layer. The bump is used, such that there is no need to perform hole plating. Therefore, an increase in the surface plating thickness due to the hole plating is previously prevented.
    Type: Application
    Filed: August 17, 2011
    Publication date: February 23, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Jong Seok Bae
  • Publication number: 20120034386
    Abstract: An apparatus and a method for coating are disclosed. The coating apparatus of the present invention, which include: a transporting part configured to transport a substrate; a coating part configured to coat a coating material on the substrate; and a squeegee installed to remove an excessive coating material after the substrate passes through the coating part and being moveable along a transporting path of the substrate, can carry out the coating operation and the squeegeeing operation together, thereby reducing the lead time of the coating operation of the substrate and increasing the productivity. By integrating the conventional coating device and squeegeeing device, the space required for installation can be saved, and the quality of coating can be improved because conditions for coating can be adjusted.
    Type: Application
    Filed: August 2, 2011
    Publication date: February 9, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yoong Oh, Jong-Seok Bae
  • Publication number: 20090049683
    Abstract: An apparatus and a method for manufacturing a printed circuit board are disclosed. The apparatus for manufacturing a printed circuit board that uses conductive bumps to interconnect layers includes: a conveyor unit, which is configured to transport a board that has the conductive bumps formed on one side; an upper roller and a lower roller, which press the board and an insulator together; an elastic coating layer, formed on a surface of the upper roller; and a cleaning device, which removes impurities from a surface of the elastic coating layer. The apparatus does not require a separate device for performing a cushioning function and a detaching function between the bumps and the rollers, and the rollers can be kept clean using a cleaning device.
    Type: Application
    Filed: March 14, 2008
    Publication date: February 26, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jee-Soo Mok, Je-Gwang Yoo, Yoong Oh, Jong-Seok Bae, Chang-Sup Ryu