Patents by Inventor Jong-Seok Bae
Jong-Seok Bae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240081404Abstract: Provided is a heater for an aerosol-generating device including a first electrically conductive pattern configured to perform heating and a second electrically conductive pattern arranged in parallel with the first electrically conductive pattern. The first electrically conductive pattern and/or the second electrically conductive pattern may include a material having a relatively small resistance temperature coefficient. Accordingly, a temperature increase rate of the heater may be greatly improved.Type: ApplicationFiled: January 13, 2022Publication date: March 14, 2024Applicant: KT&G CORPORATIONInventors: Jong Seong JEONG, Gyoung Min GO, Hyung Jin BAE, Jang Won SEO, Chul Ho JANG, Min Seok JEONG, Jin Chul JUNG
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Patent number: 10811182Abstract: An inductor includes a body in which is disposed a coil connecting a plurality of coil patterns by a via. The via includes a first conductive layer and a second conductive layer disposed on the first conductive layer, and the via has an upper portion having a transverse cross-sectional area that is greater than a transverse cross-sectional area of a lower portion thereof. An interlayer contact area of coils may be increased, thereby improving electrical characteristics and connection reliability.Type: GrantFiled: June 9, 2017Date of Patent: October 20, 2020Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Soo Yeol Kim, Jong Seok Bae, Se Woong Paeng
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Patent number: 10629364Abstract: An inductor includes a body in which is disposed a coil formed as a plurality of coil patterns connected by one or more via(s). Each via includes a first conductive layer and a second conductive layer formed on the first conductive layer, and a distance between portions of coil patterns connected by the via in the body is greater than a distance between other portions of the coil patterns in the body. Methods of forming inductors having vias including first and second conductive layers are also provided.Type: GrantFiled: September 27, 2017Date of Patent: April 21, 2020Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Se Woong Paeng, Jong Seok Bae, Soo Yeol Kim
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Patent number: 10468183Abstract: An inductor includes a body including a coil, the coil including a plurality of coil patterns connected by a via, is disposed, wherein the via includes a first conductive layer and a second conductive layer, formed on the first conductive layer, and the second conductive layer includes a conductive powder and an organic material.Type: GrantFiled: September 26, 2016Date of Patent: November 5, 2019Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Se Woong Paeng, Soo Hyun Lyoo, Jong Seok Bae
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Patent number: 10455708Abstract: A multilayered substrate in accordance with an aspect of the present disclosure may include an insulating layer, a conductive pattern embedded, at least partially, in the insulating layer, and a bump being electrically connected to the conductive pattern and penetrating the insulating layer. The bump may include a low melting point metal layer having a melting point lower than a melting point of the conductive pattern and a high melting point metal layer having a melting point higher than the melting point of the low melting point metal layer and having a latitudinal cross-sectional area smaller than a latitudinal cross-sectional area of the low melting point metal layer.Type: GrantFiled: November 13, 2017Date of Patent: October 22, 2019Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Seok-Hwan Ahn, Mi-Sun Hwang, Young-Gwan Ko, Jong-Seok Bae, Myung-Sam Kang
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Publication number: 20180301277Abstract: An inductor includes a body in which is disposed a coil formed as a plurality of coil patterns connected by one or more via(s). Each via includes a first conductive layer and a second conductive layer formed on the first conductive layer, and a distance between portions of coil patterns connected by the via in the body is greater than a distance between other portions of the coil patterns in the body. Methods of forming inductors having vias including first and second conductive layers are also provided.Type: ApplicationFiled: September 27, 2017Publication date: October 18, 2018Inventors: Se Woong PAENG, Jong Seok BAE, Soo Yeol KIM
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Publication number: 20180122553Abstract: An inductor includes a body in which is disposed a coil connecting a plurality of coil patterns by a via. The via includes a first conductive layer and a second conductive layer disposed on the first conductive layer, and the via has an upper portion having a transverse cross-sectional area that is greater than a transverse cross-sectional area of a lower portion thereof. An interlayer contact area of coils may be increased, thereby improving electrical characteristics and connection reliability.Type: ApplicationFiled: June 9, 2017Publication date: May 3, 2018Inventors: Soo Yeol KIM, Jong Seok BAE, Se Woong PAENG
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Publication number: 20180070458Abstract: A multilayered substrate in accordance with an aspect of the present disclosure may include an insulating layer, a conductive pattern embedded, at least partially, in the insulating layer, and a bump being electrically connected to the conductive pattern and penetrating the insulating layer. The bump may include a low melting point metal layer having a melting point lower than a melting point of the conductive pattern and a high melting point metal layer having a melting point higher than the melting point of the low melting point metal layer and having a latitudinal cross-sectional area smaller than a latitudinal cross-sectional area of the low melting point metal layer.Type: ApplicationFiled: November 13, 2017Publication date: March 8, 2018Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seok-Hwan AHN, Mi-Sun HWANG, Young-Gwan KO, Jong-Seok BAE, Myung-Sam KANG
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Patent number: 9832866Abstract: A multilayered substrate includes unit substrates laminated in a direction of thickness thereof, and the unit substrates include a photosensitive insulating layer, a conductive pattern disposed in the photosensitive insulating layer, and a bump penetrating into the photosensitive insulating layer and providing an interlayer connection to the conductive pattern.Type: GrantFiled: June 29, 2016Date of Patent: November 28, 2017Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Seok-Hwan Ahn, Mi-Sun Hwang, Young-Gwan Ko, Jong-Seok Bae, Myung-Sam Kang
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Publication number: 20170200551Abstract: An inductor includes a body including a coil, the coil including a plurality of coil patterns connected by a via, is disposed, wherein the via includes a first conductive layer and a second conductive layer, formed on the first conductive layer, and the second conductive layer includes a conductive powder and an organic material.Type: ApplicationFiled: September 26, 2016Publication date: July 13, 2017Inventors: Se Woong PAENG, Soo Hyun LYOO, Jong Seok BAE
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Patent number: 9667204Abstract: A power amplification apparatus includes a multiple output bias voltage generation unit, a dynamic bias modulator, and a power amplifier. The multiple output bias voltage generation unit generates first and second bias voltages using an inductor coupled between an input voltage and a plurality of capacitors. The capacitors are connected to the inductor in a non-overlapping manner. The dynamic bias modulator outputs the first bias voltage or the second bias voltage as a variable bias voltage based on results of comparing voltage of an envelope signal of a radio frequency (RF) signal to an envelope reference voltage. The power amplifier is biased in response to the variable bias voltage, amplifies power of the RF signal, and outputs the amplified RF signal to an antenna.Type: GrantFiled: May 3, 2016Date of Patent: May 30, 2017Assignee: Research & Business Foundation Sungkyunkwan UniversityInventors: Youngoo Yang, Jong Seok Bae, Sung Jae Oh, Soo Ho Cho
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Publication number: 20170040955Abstract: A power amplification apparatus includes a multiple output bias voltage generation unit, a dynamic bias modulator, and a power amplifier. The multiple output bias voltage generation unit generates first and second bias voltages using an inductor coupled between an input voltage and a plurality of capacitors. The capacitors are connected to the inductor in a non-overlapping manner. The dynamic bias modulator outputs the first bias voltage or the second bias voltage as a variable bias voltage based on results of comparing voltage of an envelope signal of a radio frequency (RF) signal to an envelope reference voltage. The power amplifier is biased in response to the variable bias voltage, amplifies power of the RF signal, and outputs the amplified RF signal to an antenna.Type: ApplicationFiled: May 3, 2016Publication date: February 9, 2017Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITYInventors: Youngoo YANG, Jong Seok BAE, Sung Jae OH, Soo Ho CHO
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Publication number: 20160381794Abstract: A multilayered substrate includes unit substrates laminated in a direction of thickness thereof, and the unit substrates include a photosensitive insulating layer, a conductive pattern disposed in the photosensitive insulating layer, and a bump penetrating into the photosensitive insulating layer and providing an interlayer connection to the conductive pattern.Type: ApplicationFiled: June 29, 2016Publication date: December 29, 2016Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Seok-Hwan AHN, Mi-Sun HWANG, Young-Gwan KO, Jong-Seok BAE, Myung-Sam KANG
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Publication number: 20140185254Abstract: Disclosed herein is a printed circuit board including: a base substrate in which a connection pad is formed; a solder resist layer formed on the base substrate and comprising a trench exposing a surface of the base substrate; and a dam formed on the solder resist layer and burying the inside of the trench.Type: ApplicationFiled: March 17, 2013Publication date: July 3, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jee Soo MOK, Jong Seok BAE, Soon Jin CHO, Duck Young MAENG
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Patent number: 8151446Abstract: An apparatus for manufacturing a printed circuit board that uses conductive bumps to interconnect layers includes: a conveyor unit, which is configured to transport a board that has the conductive bumps formed on one side; an upper roller and a lower roller, which press the board and an insulator together; an elastic coating layer, formed on a surface of the upper roller; and a cleaning device, which removes impurities from a surface of the elastic coating layer. The apparatus does not require a separate device for performing a cushioning function and a detaching function between the bumps and the rollers, and the rollers can be kept clean using a cleaning device.Type: GrantFiled: March 14, 2008Date of Patent: April 10, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jee-Soo Mok, Je-Gwang Yoo, Yoong Oh, Jong-Seok Bae, Chang-Sup Ryu
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Publication number: 20120043121Abstract: Disclosed herein are a printed circuit board and a method of manufacturing the same. The printed circuit board includes: an insulating layer; a first circuit layer including a first metal layer and a first plating layer provided on an outer side of the first metal layer and embedded in one surface of the insulating layer; a second circuit layer including a second metal layer and a second plating layer provided on an outer side of the second metal layer and embedded in the other surface of the insulating layer; and a bump interconnecting the first circuit layer and the second circuit layer while penetrating through the insulating layer. The bump is used, such that there is no need to perform hole plating. Therefore, an increase in the surface plating thickness due to the hole plating is previously prevented.Type: ApplicationFiled: August 17, 2011Publication date: February 23, 2012Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventor: Jong Seok Bae
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Publication number: 20120034386Abstract: An apparatus and a method for coating are disclosed. The coating apparatus of the present invention, which include: a transporting part configured to transport a substrate; a coating part configured to coat a coating material on the substrate; and a squeegee installed to remove an excessive coating material after the substrate passes through the coating part and being moveable along a transporting path of the substrate, can carry out the coating operation and the squeegeeing operation together, thereby reducing the lead time of the coating operation of the substrate and increasing the productivity. By integrating the conventional coating device and squeegeeing device, the space required for installation can be saved, and the quality of coating can be improved because conditions for coating can be adjusted.Type: ApplicationFiled: August 2, 2011Publication date: February 9, 2012Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Yoong Oh, Jong-Seok Bae
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Publication number: 20090049683Abstract: An apparatus and a method for manufacturing a printed circuit board are disclosed. The apparatus for manufacturing a printed circuit board that uses conductive bumps to interconnect layers includes: a conveyor unit, which is configured to transport a board that has the conductive bumps formed on one side; an upper roller and a lower roller, which press the board and an insulator together; an elastic coating layer, formed on a surface of the upper roller; and a cleaning device, which removes impurities from a surface of the elastic coating layer. The apparatus does not require a separate device for performing a cushioning function and a detaching function between the bumps and the rollers, and the rollers can be kept clean using a cleaning device.Type: ApplicationFiled: March 14, 2008Publication date: February 26, 2009Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jee-Soo Mok, Je-Gwang Yoo, Yoong Oh, Jong-Seok Bae, Chang-Sup Ryu