Abstract: A motor-driving apparatus for driving a motor having a plurality of windings respectively corresponding to a plurality of phases is provided. The motor-driving apparatus includes a first inverter having a plurality of first switching devices and connected to first ends of the plurality of windings and a second inverter having a plurality of second switching devices and connected to second ends of the plurality of windings. A third switching device is configured to selectively connect and disconnect points at which a number of turns of each of the windings is divided in a preset ratio. A controller is configured to adjust an on/off state of the first to third switching devices based on required output of the motor.

Abstract: An apparatus for manufacturing a semiconductor device includes a substrate transfer unit configured to transfer a substrate, a rail unit including a driving rail extending in a first direction that the substrate transfer unit moves and a stopper on a side of the driving rail in a second direction crossing the first direction, and a lifting unit configured to move in the first direction and a third direction perpendicular to the first and second directions to remove the substrate transfer unit from the rail unit, wherein the lifting unit is configured to contact the stopper to move the stopper from a closed state to an open state.

Abstract: A method for forming a semiconductor die, includes forming an interlayer dielectric layer on a substrate having a semiconductor die region, a seal-ring region, and a scribe line region, forming a metal pad and a test pad on the interlayer dielectric layer, forming a passivation dielectric layer on the interlayer dielectric layer, the metal pad, and the test pad, first etching the passivation dielectric layer and the interlayer dielectric layer existing between the seal-ring region and the scribe line region to a predetermined depth using a plasma etching process, second etching the passivation dielectric layer to expose the metal pad and the test pad, forming a bump on the metal pad, and dicing the substrate while removing the scribe line region by mechanical sawing.

Abstract: The present disclosure relates to a DC-DC converter, a vehicle, and a control method including the same, and more particularly, to a DC-DC converter, a vehicle, and a control method including the same capable of effectively detecting and responding to an interlock failure of a connector.

Abstract: The present invention provides a method for detecting an antigen in an analysis sample, the method including: (a) contacting an analysis sample with a detection antibody with which a marker generating a detectable signal is combined and which specifically binds to the antigen; (b) contacting a capture antibody with the resultant product of step (a), the capture antibody specifically binding to an antigen to be detected; (c) contacting the detection antibody, with which the marker generating a detectable signal is combined, with a reference substance which is bound to a surface of a solid substrate and which includes an epitope to which the detection antibody specifically binds; (d) measuring signals generated from the markers of the resultant product of step (b) and the resultant product of step (c); and (e) analyzing the measured signals to determine the presence or absence and amount of the antigen in the analysis sample.

Abstract: A multimedia platform is discussed, which includes a first stacking unit including a first substrate and a multimedia processor, wherein the first substrate and the multimedia processor are stacked on the first stacking unit, a pattern and a via hole are formed on the first substrate, and the multimedia processor is mounted on top of the first substrate; a second stacking unit including a second substrate and a plurality of storage devices, wherein the second substrate and the plurality of storage devices are stacked on the second stacking unit, a pattern and a via hole being formed on the second substrate, and the plurality of storage devices are mounted on top of the second substrate; and at least one solder ball arranged on the first stacking unit, the at least one solder ball allowing the first substrate to be coupled to the second substrate.

Abstract: The present invention provides a method for detecting an antigen in an analysis sample, the method including: (a) contacting an analysis sample with a detection antibody with which a marker generating a detectable signal is combined and which specifically binds to the antigen; (b) contacting a capture antibody with the resultant product of step (a), the capture antibody specifically binding to an antigen to be detected; (c) contacting the detection antibody, with which the marker generating a detectable signal is combined, with a reference substance which is bound to a surface of a solid substrate and which includes an epitope to which the detection antibody specifically binds; (d) measuring signals generated from the markers of the resultant product of step (b) and the resultant product of step (c); and (e) analyzing the measured signals to determine the presence or absence and amount of the antigen in the analysis sample.

Abstract: A chip having integrated multiple processor cores and a data processing method are disclosed. The processor chip includes an MP core (main processor core), an AP core (application processor core) which performs a processing function designated by a control of the MP core, a first SM controller which sets a path such that the MP core is coupled with a shared memory, and a second SM controller which sets a path such that the AP core is coupled with the shared memory. By virtue of the present invention, the number of chips installed can be minimized, to allow efficient utilization of PCB space and enable a compact size for a portable terminal.

Abstract: The present invention relates to a device having a shared memory and a code data transmitting method. According to an embodiment of the present invention, the digital processing device can include n processors, n being a natural number of 2 or greater; and a shared memory, coupled to each of the processors through independent buses and having a boot section allotted, the boot section being for writing a boot program code to be used for booting of at least one processor.

Abstract: A device having a shared memory and a shared memory controlling method are disclosed. A digital processing device can include a shared memory, having a storage area including at least one common section, coupled to each of the processors through separate buses and outputting access information to whether a processor is accessing a common section. With the present invention, each processor can efficiently use or/and control a shared memory by using access information.

Abstract: A device comprising a multimedia platform with a plurality of memories and a method of sharing a non-volatile memory. The multimedia platform in accordance with an embodiment of the present invention can have a non-volatile memory, a multimedia processor setting a route in accordance with a route selection signal received from the main processor such that the main processor accesses the non-volatile memory or the display unit, a first volatile memory which is a temporary memory device of the main processor, and a second volatile memory which is a temporary memory of the multimedia processor. With the present invention, the portable terminal can be made smaller by putting a memory chip and a multimedia platform in a single chip by use of the POP (package on package) technology.

Abstract: A method and a device for correcting a code data error are disclosed. A main processor included in a digital processing device in accordance with an embodiment of the present invention writes in a shared memory third code data error-corrected by a predetermined error correcting method or second code data written in a backup area if there is an error in first code data written in a code data area of a nonvolatile memory. The main processor or an application processor performs an operation corresponding to the third code data. With the present invention, a system can be stably operated thanks to promptly dealing with an error when the error in boot codes is detected or generated.

Abstract: A device having a shared memory and a method for providing access status information by the shared memory are disclosed. A digital processing device includes n processors and a shared memory. The shared memory is coupled to each processor though a separate bus, its storage area includes m common sections, and generates and outputs access status information related to whether an arbitrary processor is accessing at least one of the common sections. With the present invention, a control sequence of each processor can be simplified at a maximum by allowing the shared memory to generate and output access status information related to the common sections.

Abstract: A method of controlling a shared memory and a user terminal controlling the operation of the shared memory are disclosed. The portable terminal according to an embodiment of the present invention has a memory unit with a storage area partitioned to blocks in a quantity of n and a plurality of processors reading or writing data by accessing a partitioned block. At least one of the partitioned blocks is assigned as a common storage area, accessible by a processor having an access privilege, and the processor having the access privilege performs an operation of maintaining the data stored in the common storage area. With the present invention, the common storage area can be accessed by a plurality of processors, and thus the data transmission time between the processors can be minimized.

Abstract: A multimedia platform is discussed, which includes a first stacking unit including a first substrate and a multimedia processor, wherein the first substrate and the multimedia processor are stacked on the first stacking unit, a pattern and a via hole are formed on the first substrate, and the multimedia processor is mounted on top of the first substrate; a second stacking unit including a second substrate and a plurality of storage devices, wherein the second substrate and the plurality of storage devices are stacked on the second stacking unit, a pattern and a via hole being formed on the second substrate, and the plurality of storage devices are mounted on top of the second substrate; and at least one solder ball arranged on the first stacking unit, the at least one solder ball allowing the first substrate to be coupled to the second substrate.

Abstract: A portable terminal and a method of controlling a shared memory, the portable terminal are disclosed. The portable terminal includes a memory unit, being equipped with at least 2 ports and having a storage block partitioned into partitioned blocks in a quantity of n, and a plurality of processors, reading or writing data by accessing a particular partitioned block through each dedicated port. At least one of the partitioned blocks is assigned to a common storage block, accessible by a processor having an access privilege, and the access privilege is transferred between the plurality of processors. The common storage block can be partitioned into k sub partitioned blocks, which the data type and process to be stored are predetermined.

Abstract: A device and a method for sharing a memory interface are disclosed. According to preferred embodiments of the present invention, a supplementary control unit included in a digital processor can control some of the pins, constituting a memory interface, to be shared by a plurality of memory. With the present invention, the number of pins included in a memory interface can be minimized, thereby reducing the size of a supplementary control unit, saving the manufacturing cost, and improving the processing efficiency.

Abstract: A chip having integrated multiple processor cores and a data processing method are disclosed. The processor chip includes an MP core (main processor core), an AP core (application processor core) which performs a processing function designated by a control of the MP core, a first SM controller which sets a path such that the MP core is coupled with a shared memory, and a second SM controller which sets a path such that the AP core is coupled with the shared memory. By virtue of the present invention, the number of chips installed can be minimized, to allow efficient utilization of PCB space and enable a compact size for a portable terminal.

Abstract: The present invention relates to a device having a shared memory and a code data transmitting method. According to an embodiment of the present invention, the digital processing device can include n processors, n being a natural number of 2 or greater; and a shared memory, coupled to each of the processors through independent buses and having a boot section allotted, the boot section being for writing a boot program code to be used for booting of at least one processor.

Abstract: A method and device for varying the size of partitioned areas of a shared memory is disclosed. The present invention resets the size of partitioned areas by expanding the size of a shared area when data that is larger than the writable area of the shared area is to be written, after the storage area of a memory unit is partitioned to a plurality of partitioned areas by a main control unit. The memory unit is coupled with a main control unit and a supplementary control unit through independent ports. With the present invention, the data communication time between control units for processing data can be minimized, and the operation speed of each control unit can be optimized.