Abstract: A memory system includes a memory cell array including a plurality of memory cells; a peripheral circuit configured to apply a read voltage to a selected word line coupled to a selected memory cell among the memory cells, and apply a pass voltage to unselected word lines coupled to unselected memory cells other than the selected memory cell among the memory cells, during a read operation; and a controller configured to control the peripheral circuit, and apply a variable voltage level of the pass voltage based on status information of a target memory block which is the target of the read operation.

Abstract: The present technology relates to a memory system and a method of operating the memory system. The memory system includes a memory device including a plurality of semiconductor memories, and a controller for controlling the memory device to perform a test program operation and a threshold voltage distribution monitoring operation on each of the plurality of semiconductor memories during an operation. The controller sets operation performance parameters of each of the semiconductor memories based on monitoring information obtained as a result of the threshold voltage distribution monitoring operation.

Abstract: A memory system includes a storage device including a plurality of dies in which data is stored, and a memory controller configured to control an operation of the storage device, wherein the dies store pieces of reliability grade information about the respective dies, and wherein the memory controller receives the pieces of reliability grade information from the dies, sets reference values for managing the dies depending on the received reliability grade information, and manages the respective dies based on the reference values.

Abstract: A memory device includes a memory cell array including a plurality of memory blocks; a peripheral circuit configured to sequentially perform a channel initialization operation and a read operation on a memory block selected from among the plurality of memory blocks; and control logic configured to control the peripheral circuit to perform the channel initialization operation and the read operation, wherein the control logic sets a time during which the channel initialization operation is to be performed as channel initialization period depending on a potential level of supply voltage, the channel initialization operation being performed to remove hot holes in a channel of the selected memory block.

Abstract: A display device includes: a display panel including a plurality of pixels configured to receive pixel driving currents; a current sensor configured to measure an entire driving current diverged into the pixel driving currents; and a temperature sensor configured to measure an ambient temperature of the display panel, wherein the display panel includes a degradation compensator configured to generate output grayscale values for the pixels based on the entire driving current, the ambient temperature, and input grayscale values for the pixels.

Abstract: A core manufacturing apparatus using an inorganic binder includes a mulling sand feeder that supplies mulling sand comprising sand and the inorganic binder, a mold that receives the mulling sand from the mulling sand feeder and molds the mulling sand into a core, and a mold heating device that heats the mold. The mold includes an upper mold and a lower mold and has a plurality of cavities formed therein in which the mulling sand is deposited. The mold further includes an inner fluid channel through which fluid flows.

Abstract: A memory device includes a memory cell array and a peripheral circuit. The memory cell array includes a plurality of memory blocks. The peripheral circuit performs a dummy operation on a dummy area among the plurality of memory blocks of the memory cell array.

Abstract: Provided herein may be a memory device, a memory system, and a method of operating the memory device. When all of normal operation loops associated with a program operation or an erase operation of a memory cell fail, a retry operation of repeating at least one of the normal operation loops is performed in consideration of the degraded state of at least one of a source select transistor, a drain select transistor, and a dummy cell.

Abstract: Disclosed is an electric brake system.

Abstract: A memory system includes a memory cell array including a plurality of memory cells; a peripheral circuit configured to apply a read voltage to a selected word line coupled to a selected memory cell among the memory cells, and apply a pass voltage to unselected word lines coupled to unselected memory cells other than the selected memory cell among the memory cells, during a read operation; and a controller configured to control the peripheral circuit, and apply a variable voltage level of the pass voltage based on status information of a target memory block which is the target of the read operation.

Abstract: An airbag system for a vehicle is provided. The system includes an airbag cushion that is deployed from the upper portion of a seatback to cover the head of an occupant, thereby absorbing impacts applied to the head of the occupant and preventing neck bending attributable to movement of the head of the occupant. In addition, injury to the occupant is minimized by variably adjusting the deployment timing of the airbag cushion depending on the collision direction of the vehicle.

Abstract: A memory system includes a storage device including a plurality of dies in which data is stored, and a memory controller configured to control an operation of the storage device, wherein the dies store pieces of reliability grade information about the respective dies, and wherein the memory controller receives the pieces of reliability grade information from the dies, sets reference values for managing the dies depending on the received reliability grade information, and manages the respective dies based on the reference values.

Abstract: A memory device includes a memory cell array and a peripheral circuit. The memory cell array includes a plurality of memory blocks. The peripheral circuit performs a dummy operation on a dummy area among the plurality of memory blocks of the memory cell array.

Abstract: Provided herein may be a memory device, a memory system, and a method of operating the memory device. When all of normal operation loops associated with a program operation or an erase operation of a memory cell fail, a retry operation of repeating at least one of the normal operation loops is performed in consideration of the degraded state of at least one of a source select transistor, a drain select transistor, and a dummy cell.

Abstract: A memory device includes a memory cell array including a plurality of memory blocks; a peripheral circuit configured to sequentially perform a channel initialization operation and a read operation on a memory block selected from among the plurality of memory blocks; and control logic configured to control the peripheral circuit to perform the channel initialization operation and the read operation, wherein the control logic sets a time during which the channel initialization operation is to be performed as channel initialization period depending on a potential level of supply voltage, the channel initialization operation being performed to remove hot holes in a channel of the selected memory block.

Abstract: Disclosed are an in-vessel control rod drive mechanism and a nuclear reactor with the same. The in-vessel control rod drive mechanism includes a control rod drive mechanism for regulating and a control rod drive mechanism for shutdown provided at an upper or lower space of a reactor core to insert or withdraw a regulating rod and a shutdown rod into/from the reactor core based on an operation state of the nuclear reactor, wherein the control rod drive mechanism for regulating and the control rod drive mechanism for shutdown are alternately arranged in the vertical direction. Therefore, a space of containment can be minimized due to the installation of the in-vessel control rod drive mechanism, and thus a rod ejection accident can be prevented, and a loss-of-coolant accident can be reduced.

Abstract: A magnetostrictive wire control rod position indicator for determining a real-time position of a control rod using a mutual interference effect between a magnetic field formed by supplying a pulse current to a magnetostrictive wire provided inside a protecting tube and a magnetic field formed by a permanent magnet of a drive shaft includes magnet members installed at an upper limit position and a lower limit position of the magnetostrictive wire control rod position indicator to cause magnetic field interference with the permanent magnet of the drive shaft.

Abstract: Provided are a sterilization apparatus including a sterilization chamber, a vacuum pump connected to one side of the sterilization chamber, a vaporizer connected to another side of the sterilization chamber, and a collector having one side connected to the vaporizer and the other side connected to the sterilization chamber and a sterilization method using the sterilization apparatus. In the sterilization apparatus and the sterilization method, a hydrogen peroxide solution having a concentration of 95 wt % or higher may be obtained through multiple concentration steps and used as a sterilant, thereby considerably improving a sterilization effect.

Abstract: An electronic brake system and a method for operating the same are disclosed. The electronic brake system includes a hydraulic-pressure supply device and a hydraulic-pressure control unit. The hydraulic-pressure supply device operates a hydraulic piston using an electric signal corresponding to a displacement of a brake pedal, and thus generates hydraulic pressure. The hydraulic-pressure control unit controls hydraulic pressure of a pressure medium supplied to individual wheel cylinders. The electronic brake system controls a plurality of valves mounted to the hydraulic-pressure control unit, and thus performs a normal operation mode, an abnormal operation mode, a regenerative braking mode, and an inspection mode using the valves.

Abstract: A brake control apparatus according to an embodiment of the present disclosure includes a braking device configured to generate a braking pressure based on a hydraulic pressure to provide a main braking force to a vehicle; and a controller configured to control at least one control module selected based on the speed of the vehicle among a plurality of control modules including an engine control module (EMS) of the vehicle, a motor control module and a parking brake control module to provide an auxiliary braking force to the vehicle when the braking device is in an abnormal state.