Patents by Inventor Jong Yeog Son

Jong Yeog Son has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230154530
    Abstract: Provided is an electronic device including a first electrode part including a conductive material, a second electrode part spaced apart from the first electrode part and including a conductive material, an active layer disposed between the first electrode part and the second electrode part, including a spontaneously polarizable material, and formed to optionally have a first mode having a first electrical resistance and a second mode having a value smaller than the first electrical resistance, and an electric field controller connected to the first electrode part and the second electrode part to apply an electric field.
    Type: Application
    Filed: April 22, 2021
    Publication date: May 18, 2023
    Inventors: Jong Hwa SON, Jong Yeog SON
  • Patent number: 11527715
    Abstract: Provided is an electronic device including a first electrode; a second electrode facing the first electrode; and an active layer between the first electrode and the second electrode, wherein at least one of the first electrode and the second electrode includes a first surface that is closest to the active layer and a second surface that is farthest from the active layer, a size of a cross-sectional horizontal area at the first surface is smaller than a size of a cross-sectional horizontal area at the second surface, the active layer includes a first region, which vertically overlaps the first surface, and a second region outside the first region, and a thickness of the active layer in the first region is smaller than a thickness of the active layer in the second region.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: December 13, 2022
    Assignee: VMEMORY CORP.
    Inventors: Jong Hwa Son, Jong Yeog Son
  • Publication number: 20220131483
    Abstract: A method of controlling a current path range using an electric field is disclosed, and the method of controlling a current path range includes applying an electric field to an active layer including a spontaneous polarization material through an application electrode disposed adjacent to the active layer to form a polarization region of the active layer, and forming a variable low resistance region corresponding to a boundary of the polarization region, wherein the variable low resistance region is a region of the active layer having a lower electrical resistance than another region of the active layer adjacent to the variable low resistance region and allows an electrical path to be formed.
    Type: Application
    Filed: January 11, 2022
    Publication date: April 28, 2022
    Inventors: Jong Hwa SON, Jong Yeog SON
  • Publication number: 20220077164
    Abstract: A variable low-resistance line memory device and an operating method thereof are provided. The memory device includes: a base including a spontaneous polarizable material; a gate arranged adjacent to the base; at least two polarization regions formed in the base by applying an electric field to the base through the gate, the at least two polarization regions having polarization in different directions from each other; a variable low-resistance line corresponding to a boundary between the at least two polarization regions selectively having polarization in different directions from each other; a source located to contact the variable low-resistance line; and a drain located to contact the variable low-resistance line, wherein the variable low-resistance line is formed in a region of the base, the region having a lower electrical resistance than other regions of the base adjacent to the variable low-resistance line.
    Type: Application
    Filed: November 16, 2021
    Publication date: March 10, 2022
    Inventors: Jong Hwa SON, Jong Yeog SON
  • Patent number: 11251724
    Abstract: A method of controlling a current path range using an electric field is disclosed, and the method of controlling a current path range includes applying an electric field to an active layer including a spontaneous polarization material through an application electrode disposed adjacent to the active layer to form a polarization region of the active layer, and forming a variable low resistance region corresponding to a boundary of the polarization region, wherein the variable low resistance region is a region of the active layer having a lower electrical resistance than another region of the active layer adjacent to the variable low resistance region and allows an electrical path to be formed.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: February 15, 2022
    Assignee: VMEMORY CORP.
    Inventors: Jong Hwa Son, Jong Yeog Son
  • Patent number: 11211405
    Abstract: A variable low-resistance line memory device and an operating method thereof are provided. The memory device includes: a base including a spontaneous polarizable material; a gate arranged adjacent to the base; at least two polarization regions formed in the base by applying an electric field to the base through the gate, the at least two polarization regions having polarization in different directions from each other; a variable low-resistance line corresponding to a boundary between the at least two polarization regions selectively having polarization in different directions from each other; a source located to contact the variable low-resistance line; and a drain located to contact the variable low-resistance line, wherein the variable low-resistance line is formed in a region of the base, the region having a lower electrical resistance than other regions of the base adjacent to the variable low-resistance line.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: December 28, 2021
    Assignee: VMEMORY CORP.
    Inventors: Jong Hwa Son, Jong Yeog Son
  • Publication number: 20210313336
    Abstract: A variable low-resistance line memory device and an operating method thereof are provided. The memory device includes: a base including a spontaneous polarizable material; a gate arranged adjacent to the base; at least two polarization regions formed in the base by applying an electric field to the base through the gate, the at least two polarization regions having polarization in different directions from each other; a variable low-resistance line corresponding to a boundary between the at least two polarization regions selectively having polarization in different directions from each other; a source located to contact the variable low-resistance line; and a drain located to contact the variable low-resistance line, wherein the variable low-resistance line is formed in a region of the base, the region having a lower electrical resistance than other regions of the base adjacent to the variable low-resistance line.
    Type: Application
    Filed: October 24, 2019
    Publication date: October 7, 2021
    Inventors: Jong Hwa SON, Jong Yeog SON
  • Publication number: 20210313426
    Abstract: Provided is an electronic device including a first electrode; a second electrode facing the first electrode; and an active layer between the first electrode and the second electrode, wherein at least one of the first electrode and the second electrode includes a first surface that is closest to the active layer and a second surface that is farthest from the active layer, a size of a cross-sectional horizontal area at the first surface is smaller than a size of a cross-sectional horizontal area at the second surface, the active layer includes a first region, which vertically overlaps the first surface, and a second region outside the first region, and a thickness of the active layer in the first region is smaller than a thickness of the active layer in the second region.
    Type: Application
    Filed: September 4, 2019
    Publication date: October 7, 2021
    Inventors: Jong Hwa SON, Jong Yeog SON
  • Publication number: 20210249975
    Abstract: A method of controlling a current path range using an electric field is disclosed, and the method of controlling a current path range includes applying an electric field to an active layer including a spontaneous polarization material through an application electrode disposed adjacent to the active layer to form a polarization region of the active layer, and forming a variable low resistance region corresponding to a boundary of the polarization region, wherein the variable low resistance region is a region of the active layer having a lower electrical resistance than another region of the active layer adjacent to the variable low resistance region and allows an electrical path to be formed.
    Type: Application
    Filed: August 29, 2019
    Publication date: August 12, 2021
    Inventors: Jong Hwa SON, Jong Yeog SON
  • Patent number: 8377730
    Abstract: Provided is a method of manufacturing a sensor structure, where vertically-well-aligned nanotubes are formed and the sensor structure having an excellent performance can be manufactured at the room temperature at low cost by using the nanotubes. The method of manufacturing a sensor structure includes: (a) forming a lower electrode on a substrate; (b) forming an organic template having a pore structure on the lower electrode; (c) forming a metal oxide thin film in the organic template; (d) forming a metal oxide nanotube structure, in which nanotubes are vertically aligned and upper portions thereof are connected to each other, by removing the organic template through a dry etching method; and (e) forming an upper electrode on the upper portions of the nanotubes.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: February 19, 2013
    Assignee: Postech Academy-Industry Foundation
    Inventors: Seung Yun Yang, Gumhye Jeon, Hyungjun Kim, Jong Yeog Son, Chang-Soo Lee, Jin Kon Kim, Jinseok Byun
  • Publication number: 20110012103
    Abstract: Provided is a method of manufacturing a sensor structure, where vertically-well-aligned nanotubes are formed and the sensor structure having an excellent performance can be manufactured at the room temperature at low cost by using the nanotubes. The method of manufacturing a sensor structure includes: (a) forming a lower electrode on a substrate; (b) forming an organic template having a pore structure on the lower electrode; (c) forming a metal oxide thin film in the organic template; (d) forming a metal oxide nanotube structure, in which nanotubes are vertically aligned and upper portions thereof are connected to each other, by removing the organic template through a dry etching method; and (e) forming an upper electrode on the upper portions of the nanotubes.
    Type: Application
    Filed: December 28, 2009
    Publication date: January 20, 2011
    Inventors: Seung Yun Yang, Gumhye Jeon, Hyungjun Kim, Jong Yeog Son, Chang-Soo Lee, Jin Kon Kim, Jinseok Byun