Abstract: To program in a nonvolatile memory device including a cell region including first metal pads and a peripheral region including second metal pads and vertically connected to the cell region by the first metal pads and the second metal pads, a memory block is provided with a plurality of sub blocks disposed in a vertical direction where the memory block includes a plurality of cell strings each including a plurality of memory cells connected in series and disposed in the vertical direction. A plurality of intermediate switching transistors are disposed in a boundary portion between two adjacent sub blocks in the vertical direction. Each of the plurality of intermediate switching transistors is selectively activated based on a program address during a program operation. The selectively activating each of the plurality of intermediate switching transistors includes selectively turning on one or more intermediate switching transistors in a selected cell string based on the program address.

Abstract: The disclosure generally relates to techniques for efficiently allocating resources allocated from a macro base station by estimating the communication possibility of each sensor without direct communication with the sensor in a mobile base station. A method for resource allocation in a mobile base station may include detecting at least one sensor within a communicable range of the mobile base station, estimating a communication possibility of the sensor based on a message queue and a remaining battery level of the at least one sensor, receiving resource allocation from a macro base station based on the communication possibility, and allocating the allocated resource to the sensor.

Abstract: The disclosure generally relates to techniques for efficiently allocating resources allocated from a macro base station by estimating the communication possibility of each sensor without direct communication with the sensor in a mobile base station. A method for resource allocation in a mobile base station may include detecting at least one sensor within a communicable range of the mobile base station, estimating a communication possibility of the sensor based on a message queue and a remaining battery level of the at least one sensor, receiving resource allocation from a macro base station based on the communication possibility, and allocating the allocated resource to the sensor.

Abstract: A method of fabricating a semiconductor device in which a LOCOS profile characteristic is applied to a normal shallow trench isolation (STI) structure thereby lowering compressive stress that is concentrated on the side of the STI and preventing a thinning phenomenon by which the oxide film is formed in a relatively thin thickness at the boundary of the STI and the gate oxide film for high voltage (HV) region. The STI of a CVD oxide material including an angular bird's beak extension structure is formed in a field region, a gate oxide film is formed in a relatively thick thickness in a HV region by using a nitride film as a mask, and a gate oxide film having a relatively thin thickness is formed in a low voltage (LV) region.

Abstract: A method of fabricating a semiconductor device in which a LOCOS profile characteristic is applied to a normal shallow trench isolation (STI) structure thereby lowering compressive stress that is concentrated on the side of the STI and preventing a thinning phenomenon by which the oxide film is formed in a relatively thin thickness at the boundary of the STI and the gate oxide film for high voltage (HV) region. The STI of a CVD oxide material including an angular bird's beak extension structure is formed in a field region, a gate oxide film is formed in a relatively thick thickness in a HV region by using a nitride film as a mask, and a gate oxide film having a relatively thin thickness is formed in a low voltage (LV) region.

Abstract: A shallow trench isolation (STI) structure is constructed in dual gate oxide device that requires a high voltage and low-voltage operation, for example in a LCD driver IC. The disclosed fabrication method prevents deterioration in operational characteristics of resulting transistors and prevents decrease in the reliability of the gate oxide film.