Patents by Inventor Joo-weon Shin

Joo-weon Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9449918
    Abstract: A semiconductor device has improved reliability by preventing a fuse cut through a repair process from being electrically reconnected by electrochemical migration. The semiconductor device includes a substrate, a fuse including a first fuse pattern and a second fuse pattern formed at the same level on the substrate, the first fuse pattern and the second fuse pattern being spaced a first width apart from each other such that a gap in the fuse is disposed at a first location between the first fuse pattern and the second fuse pattern, and a first insulation layer formed on the first fuse pattern and the second fuse pattern, the first insulation layer including an opening above the first location and having a second width smaller than the first width.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: September 20, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Moon-Gi Cho, Eun-Chul Ahn, Sang-Young Kim, Joo-Weon Shin, Min-Ho Lee
  • Publication number: 20150325518
    Abstract: A semiconductor device has improved reliability by preventing a fuse cut through a repair process from being electrically reconnected by electrochemical migration. The semiconductor device includes a substrate, a fuse including a first fuse pattern and a second fuse pattern formed at the same level on the substrate, the first fuse pattern and the second fuse pattern being spaced a first width apart from each other such that a gap in the fuse is disposed at a first location between the first fuse pattern and the second fuse pattern, and a first insulation layer formed on the first fuse pattern and the second fuse pattern, the first insulation layer including an opening above the first location and having a second width smaller than the first width.
    Type: Application
    Filed: July 14, 2015
    Publication date: November 12, 2015
    Inventors: Moon-Gi CHO, Eun-Chul AHN, Sang-Young KIM, Joo-Weon SHIN, Min-Ho LEE
  • Patent number: 9123725
    Abstract: A semiconductor device has improved reliability by preventing a fuse cut through a repair process from being electrically reconnected by electrochemical migration. The semiconductor device includes a substrate, a fuse including a first fuse pattern and a second fuse pattern formed at the same level on the substrate, the first fuse pattern and the second fuse pattern being spaced a first width apart from each other such that a gap in the fuse is disposed at a first location between the first fuse pattern and the second fuse pattern, and a first insulation layer formed on the first fuse pattern and the second fuse pattern, the first insulation layer including an opening above the first location and having a second width smaller than the first width.
    Type: Grant
    Filed: November 25, 2013
    Date of Patent: September 1, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Moon-Gi Cho, Eun-Chul Ahn, Sang-Young Kim, Joo-Weon Shin, Min-Ho Lee
  • Publication number: 20140151845
    Abstract: A semiconductor device has improved reliability by preventing a fuse cut through a repair process from being electrically reconnected by electrochemical migration. The semiconductor device includes a substrate, a fuse including a first fuse pattern and a second fuse pattern formed at the same level on the substrate, the first fuse pattern and the second fuse pattern being spaced a first width apart from each other such that a gap in the fuse is disposed at a first location between the first fuse pattern and the second fuse pattern, and a first insulation layer formed on the first fuse pattern and the second fuse pattern, the first insulation layer including an opening above the first location and having a second width smaller than the first width.
    Type: Application
    Filed: November 25, 2013
    Publication date: June 5, 2014
    Inventors: Moon-Gi CHO, Eun-Chul AHN, Sang-Young KIM, Joo-Weon SHIN, Min-Ho LEE
  • Publication number: 20050114064
    Abstract: A method for performing a parallel bit test of a semiconductor memory device, including writing data to each of a plurality of memory cells, reading data from each of the plurality of memory cells, testing the data from each of the plurality of memory cells in a first test mode, and testing the data from each of the plurality of memory cells in a second test mode. A circuit including a first test mode circuit for receiving first data, a second test mode circuit for receiving second data, and wherein the first test mode circuit tests the received first data and the second test mode tests the received second data. Another circuit including a first comparator with a plurality of comparison circuits, a test mode selector for selecting at least one of a plurality of outputs from the first comparator, and a second comparator for receiving the selected output.
    Type: Application
    Filed: August 5, 2004
    Publication date: May 26, 2005
    Inventors: Joo-weon Shin, Byung-chul Kim, Seung-bum Ko, Soo-in Cho