Patents by Inventor Joon Ho Yoon

Joon Ho Yoon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140000852
    Abstract: An indoor unit of an air conditioner having improved structures of suction, discharge and/or flow passages which may increase operation efficiency, reduce noises and realize a compact size. The indoor unit includes a housing comprising a front panel and a rear panel coupled to a rear portion of the front panel, at least one discharge outlet exposed to a front of the front panel, at least one suction inlet formed in the rear panel at a position corresponding to the discharge outlet, at least one heat exchanger disposed at a front portion of the suction inlet to absorb heat from air introduced through the suction inlet or transfer heat to the air introduced through the suction inlet, and at least one diagonal flow fan disposed between the heat exchanger and the discharge outlet to suction air passing through the heat exchanger and discharge the air through the discharge outlet.
    Type: Application
    Filed: June 27, 2013
    Publication date: January 2, 2014
    Inventors: Jung Ho KIM, Jin Baek KIM, Yeon Seob YUN, Tae Duk KIM, Woo Seog SONG, Moon Sun SHIN, Hae Gyun SHIN, Ki Pyo AHN, Joon Ho YOON, Min Gi CHO, Jae Youn CHO, Sun Muk CHOI, Hyoung Seo CHOI, Dong Gi HAN, Jin Woo HONG, Jun HWANG
  • Patent number: 8012792
    Abstract: The invention provides a high quality composite phosphor powder which ensures diversity in emission spectrum, color reproduction index, color temperature and color, a light emitting device using the same and a method for manufacturing the composite phosphor powder. The composite phosphor powder comprises composite particles. Each of the composite particles includes at least two types of phosphor particles and a light transmitting binder. The phosphor particles have different emission spectrums. In addition, the light transmitting binder is formed between the phosphor particles and binds them together.
    Type: Grant
    Filed: October 21, 2010
    Date of Patent: September 6, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Chulsoo Yoon, Joon Ho Yoon, Chang Hoon Kwak, Yun Seup Chung
  • Patent number: 7911127
    Abstract: The present invention relates to phosphor blend for wavelength conversion and a white light emitting device using the same. The phosphor blend of the invention comprises three phosphors, A5(PO4)3Cl:Eu2+, D2SiO4:Eu and MS:Eu at a composition where near ultraviolet radiation is converted into light positioned at a CIE coordinate (x, y), where 0.25?x?0.45 and 0.25?y?0.43, wherein A comprises at least one of Sr, Ca, Ba, and Mg, D comprises at least one of Ba, Sr, and Ca, and M comprises at least one of Sr and Ca. Furthermore, the present invention provides a new white light emitting device in combination of the phosphor blend and a near ultraviolet LED.
    Type: Grant
    Filed: December 28, 2005
    Date of Patent: March 22, 2011
    Assignee: Samsung LED Co., Ltd.
    Inventors: Jong Rak Sohn, Il Woo Park, Yun Seup Chung, Chang Hoon Kwak, Chul Soo Yoon, Joon Ho Yoon
  • Publication number: 20110031521
    Abstract: The invention provides a high quality composite phosphor powder which ensures diversity in emission spectrum, color reproduction index, color temperature and color, a light emitting device using the same and a method for manufacturing the composite phosphor powder. The composite phosphor powder comprises composite particles. Each of the composite particles includes at least two types of phosphor particles and a light transmitting binder. The phosphor particles have different emission spectrums. In addition, the light transmitting binder is formed between the phosphor particles and binds them together.
    Type: Application
    Filed: October 21, 2010
    Publication date: February 10, 2011
    Applicant: SAMSUNG LED CO., LTD.
    Inventors: Chulsoo YOON, Joon Ho Yoon, Chang Hoon Kwak, Yun Seup Chung
  • Patent number: 7832312
    Abstract: The invention provides a high quality composite phosphor powder which ensures diversity in emission spectrum, color reproduction index, color temperature and color, a light emitting device using the same and a method for manufacturing the composite phosphor powder. The composite phosphor powder comprises composite particles. Each of the composite particles includes at least two types of phosphor particles and a light transmitting binder. The phosphor particles have different emission spectrums. In addition, the light transmitting binder is formed between the phosphor particles and binds them together.
    Type: Grant
    Filed: August 23, 2006
    Date of Patent: November 16, 2010
    Assignee: Samsung LED Co., Ltd.
    Inventors: Chulsoo Yoon, Joon Ho Yoon, Chang Hoon Kwak, Yun Seup Chung
  • Patent number: 7560057
    Abstract: Disclosed herein is a method for producing a molding compound resin tablet for wavelength conversion. The method comprises the steps of wet-dispersing a phosphor powder in a translucent liquid resin to form a molding compound resin body in which the phosphor powder is dispersed, and grinding the molding compound resin body into a powder form and applying a predetermined pressure to the resin powder. Further disclosed is a method for manufacturing a white light emitting diode using the molding compound resin tablet by a transfer molding process.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: July 14, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Joon Ho Yoon, Seon Goo Lee, Doo Hoon Ahn
  • Patent number: 7332855
    Abstract: The present invention provides a phosphor blend for wavelength conversion and a white light emitting device using the phosphor blend. Further disclosed is a white light emitting phosphor blend comprising 0.5˜18 wt % of A5(PO4)3Cl:Eu2+ (where A is at least one element selected from Sr, Ca, Ba and Mg), 0.7˜14 wt of D2SiO4:Eu (where D is at least one element selected from Ba, Sr and Ca), and 68˜98.5 wt % of G5EuS(WO4)2.5+1.5S:Sm (where G is at least one element selected from Li, Na and K; and s is a number between 1 and 5), based on the total weight of the phosphor blend.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: February 19, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong Rak Sohn, Chul Soo Yoon, Joon Ho Yoon
  • Publication number: 20070120290
    Abstract: Disclosed herein is a method for producing a molding compound resin tablet for wavelength conversion. The method comprises the steps of wet-dispersing a phosphor powder in a translucent liquid resin to form a molding compound resin body in which the phosphor powder is dispersed, and grinding the molding compound resin body into a powder form and applying a predetermined pressure to the resin powder. Further disclosed is a method for manufacturing a white light emitting diode using the molding compound resin tablet by a transfer molding process.
    Type: Application
    Filed: December 29, 2006
    Publication date: May 31, 2007
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Joon Ho YOON, Seon Goo LEE, Doo Hoon AHN
  • Patent number: 7176058
    Abstract: Disclosed are a chip scale package and a method of fabricating the chip scale package. The chip scale package comprises conductive layers with a designated depth formed on an upper and a lower surfaces of a chip, and electrode surfaces formed on the same side surfaces of the conductive layers, which are connected to corresponding connection pads of a printed circuit board. The chip scale package is miniaturized in the whole package size. Further, the method of fabricating the chip scale package does not require a wire-bonding step or a via hole forming step, thereby simplifying the fabrication process of the chip scale package and improving the reliability of the chip scale package.
    Type: Grant
    Filed: November 16, 2004
    Date of Patent: February 13, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Joon Ho Yoon, Yong Chil Choi, Suk Su Bae
  • Patent number: 7157029
    Abstract: Disclosed herein is a method for producing a molding compound resin tablet for wavelength conversion. The method comprises the steps of wet-dispersing a phosphor powder in a translucent liquid resin to form a molding compound resin body in which the phosphor powder is dispersed, and grinding the molding compound resin body into a powder form and applying a predetermined pressure to the resin powder. Further disclosed is a method for manufacturing a white light emitting diode using the molding compound resin tablet by a transfer molding process.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: January 2, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Joon Ho Yoon, Seon Goo Lee, Doo Hoon Ahn
  • Patent number: 7071570
    Abstract: A chip scale package has an insulating layer formed on the upper surface of a chip provided with a plurality of terminals on its one surface, a plurality of conductive layers formed on the insulating layer and spaced from each other by a designated distance so as to be connected to each of a plurality of the terminals, and a plurality of electrode surface layers formed on each of the upper surfaces of a plurality of the conductive layers.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: July 4, 2006
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Joon Ho Yoon, Yong Chil Choi, Suk Su Bae
  • Patent number: 6984539
    Abstract: A method of manufacturing a light-emitting diode (LED) device includes forming a lead frame having a first pattern part mounted with an LED chip, a second pattern part electrically connected to the first pattern part to be used as an electrode, a third pattern part spaced from the first pattern part to be electrically insulated from the first pattern part and used as another electrode, and a fourth pattern part and a fifth pattern part integrated with both sides of the first pattern part, forming a layer plated with a metal having high reflectivity on the fourth and fifth pattern parts, and upwardly folding the fourth and fifth pattern parts to be perpendicular to the first pattern part to form reflective surfaces.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: January 10, 2006
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Joon Ho Yoon
  • Patent number: 6841416
    Abstract: A method of fabricating a chip scale package includes: preparing a wafer including a plurality of chips; forming an insulating layer on the upper surface of the wafer except in areas of two upper terminals of each chip; forming an upper conductive layer on the insulating layer so as to be connected to the upper terminals of the chips; forming a lower conductive layer on the lower surface of the wafer so as to be connected to a lower terminals of each chip; first dicing the wafer so that one side of the chip scale package is formed; forming electrode surfaces on side surfaces of the upper and the lower conductive layers which are defined by the side of the chip scale package formed in the first dicing step; dividing the upper conductive layer of each chip into two areas each connected to one of the two upper terminals; and second dicing the wafer into package units.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: January 11, 2005
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Joon Ho Yoon, Yong Chil Choi, Suk Su Bae
  • Publication number: 20040248332
    Abstract: Disclosed is a method of manufacturing a light-emitting diode (LED) device, which is advantageous in terms of easy formation of metal material reflective surfaces using a lead frame, thereby improving the luminance characteristics by a simple manufacturing process. The current method includes forming the lead frame having a first pattern part mounted with an LED chip, a second pattern part electrically connected to the first pattern part to be used as an electrode, a third pattern part spaced from the first pattern part to be electrically insulated from the first pattern part and used as another electrode, a fourth pattern part and a fifth pattern part integrated with both sides of the first pattern part, forming a layer plated with a metal having high reflectivity on the fourth and fifth pattern parts, and upwardly folding the fourth and fifth pattern parts to be perpendicular to the first pattern part to form the reflective surfaces.
    Type: Application
    Filed: July 14, 2003
    Publication date: December 9, 2004
    Inventor: Joon Ho Yoon
  • Patent number: 6815257
    Abstract: Disclosed are a chip scale package and a method of fabricating the chip scale package. The chip scale package comprises an insulating layer formed on the upper surface of a chip provided with a plurality of terminals on its one surface, a plurality of conductive layers formed on the insulating layer and spaced from each other by a designated distance so as to be connected to each of a plurality of the terminals, and a plurality of electrode surfaces formed on each of the upper surfaces of a plurality of the conductive layers. The chip scale package is miniaturized in the whole package size. Further, the method of fabricating the chip scale package does not require a wire-bonding step or a via hole forming step, thereby simplifying the fabrication process of the chip scale package and improving the reliability of the chip scale package.
    Type: Grant
    Filed: December 27, 2002
    Date of Patent: November 9, 2004
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Joon Ho Yoon, Yong Chil Choi, Suk Su Bae
  • Patent number: 6730539
    Abstract: A method of manufacturing a semiconductor device package includes forming a patterned photoresist film with windows for exposing a plurality of connection bump areas on a conductive substrate, forming metal plating layers on the connection bumps area using the photoresist film, and forming first gold plating layers on the metal plating layers. The metal plating layers prevent the diffusion of the first gold plating layers into the conductive substrate. According to the method, high-qualified conductive layers are formed on the connection bumps by a simplified manufacturing process. Further, connection bumps having an upper part in an almost hemispherical shape are formed on the first gold plating layers, thereby improving the reliability of the semiconductor device package.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: May 4, 2004
    Assignee: Samsung Electro-Machanics Co., Ltd.
    Inventors: Chan Wang Park, Joon Ho Yoon
  • Publication number: 20030194855
    Abstract: Disclosed is a method of manufacturing a semiconductor device package, comprising the steps of forming a patterned photoresist film with windows for exposing a plurality of connection bump areas on a conductive substrate, forming metal plating layers on the connection bumps area using the photoresist film, and forming first gold plating layers on the metal plating layers. The metal plating layers prevent the diffusion of the first gold plating layers into the conductive substrate. The method of manufacturing the semiconductor device package according to the present invention forms high-qualified conductive layers on the connection bumps by a simplified manufacturing process. Further, connection bumps having an upper part in an almost hemispherical shape are formed on the first gold plating layers, thereby improving the reliability of the semiconductor device package.
    Type: Application
    Filed: December 26, 2002
    Publication date: October 16, 2003
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Chan Wang Park, Joon Ho Yoon
  • Publication number: 20030176015
    Abstract: Disclosed are a chip scale package and a method of fabricating the chip scale package. The chip scale package comprises a first and a second conductive layers formed on insulating layer and spaced from each other by a designated distance so as to be connected to each of two terminals, a third conductive layer formed on the second surface of the chip so as to be connected to the terminal of the second surface of the chip, and electrode surfaces formed on each of designated side surfaces of the first, the second, and the third conductive layers. The chip scale package is miniaturized in the whole package size. Further, the method of fabricating the chip scale package does not require a wire-bonding step or a via hole forming step, thereby simplifying the fabrication process of the chip scale package and improving the reliability of the chip scale package.
    Type: Application
    Filed: December 27, 2002
    Publication date: September 18, 2003
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Joon Ho Yoon, Yong Chil Choi, Suk Su Bae
  • Patent number: D558156
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: December 25, 2007
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Joon Yoon, Joon Ho Yoon, Jae Woo Cho, Ok Hee Shin, Young Taek Kim, Hong Min Kim
  • Patent number: D499075
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: November 30, 2004
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Joon Ho Yoon, Jung Kyu Park, Young Sam Park