Patents by Inventor Joonsik AN

Joonsik AN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160067944
    Abstract: Disclosed are a decorative tape including a printing layer, a base film layer on the printing layer, a nickel deposited layer on the base film layer and a pressure-sensitive adhesive layer on the nickel deposited layer; a method of manufacturing the decorative tape; and a decorative cover using the decorative tape.
    Type: Application
    Filed: April 18, 2014
    Publication date: March 10, 2016
    Inventors: Joonsik Hwang, Hanbyol Shim
  • Publication number: 20150214089
    Abstract: A method for processing substrates includes providing a bonding layer between a substrate and a carrier to bond the substrate to the carrier, processing the substrate while the substrate is supported by the carrier, and removing the bonding layer to separate the substrate from the carrier. The bonding layer may include a thermosetting release layer and thermosetting glue layers, wherein at least one of the thermosetting glue layers is provided on each side of the thermosetting release layer.
    Type: Application
    Filed: April 9, 2015
    Publication date: July 30, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventors: CHUNGSUN LEE, Jung-Seok AHN, Kwang-chul CHOI, Un-Byoung KANG, Jung-Hwan KIM, JOONSIK SOHN, JEON IL LEE
  • Patent number: 9023716
    Abstract: A method for processing substrates includes providing a bonding layer between a substrate and a carrier to bond the substrate to the carrier, processing the substrate while the substrate is supported by the carrier, and removing the bonding layer to separate the substrate from the carrier. The bonding layer may include a thermosetting release layer and thermosetting glue layers, wherein at least one of the thermosetting glue layers is provided on each side of the thermosetting release layer.
    Type: Grant
    Filed: January 6, 2014
    Date of Patent: May 5, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chungsun Lee, Jung-Seok Ahn, Kwang-chul Choi, Un-Byoung Kang, Jung-Hwan Kim, Joonsik Sohn, Jeon Il Lee
  • Patent number: 8907047
    Abstract: A water-soluble nanoparticle complex has a plurality of accumulated nanoparticles and has excellent uniformity and stability by forming a complex of nanoparticles using a water-soluble polymer and which allows for use of nanoparticles in biochemical applications.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: December 9, 2014
    Assignee: Toray Industries, Inc.
    Inventors: Joonsik Park, Masashi Higasa, Asako Sogame
  • Publication number: 20140271272
    Abstract: A power converter and an air conditioner having the same, in which the power converter includes a rectifying unit configured to rectify an input AC current and an interleave converter that has a plurality of converters and that is configured to convert rectified output from the rectifying unit to DC power and output the converted DC power. The power converter also includes a capacitor connected to an output terminal of the interleave converter, and a converter controller configured to control the interleave converter. The converter controller controls the interleave converter by calculating a load level of both terminals of the capacitor and changing a number of operating converters in the plurality of converters of the interleave converter based on the determined load level of both terminals of the capacitor.
    Type: Application
    Filed: March 12, 2014
    Publication date: September 18, 2014
    Applicant: LG Electronics Inc.
    Inventors: Jonghyun JEON, Taeyoung PARK, Jungsong MOON, Sangyoung KIM, Joonsik AN
  • Publication number: 20140210075
    Abstract: A method for processing substrates includes providing a bonding layer between a substrate and a carrier to bond the substrate to the carrier, processing the substrate while the substrate is supported by the carrier, and removing the bonding layer to separate the substrate from the carrier. The bonding layer may include a thermosetting release layer and thermosetting glue layers, wherein at least one of the thermosetting glue layers is provided on each side of the thermosetting release layer.
    Type: Application
    Filed: January 6, 2014
    Publication date: July 31, 2014
    Applicant: Samsung Electronics Co., Ltd
    Inventors: CHUNGSUN LEE, Jung-Seok AHN, Kwang-chul CHOI, Un-Byoung KANG, Jung-Hwan KIM, JOONSIK SOHN, JEON IL LEE
  • Publication number: 20140109935
    Abstract: A method of controlling an automatic cleaner in which the automatic cleaner is moved with a side brush assembly in a first operation type, a corner is determined during the movement of the automatic cleaner, the first operation type of the side brush assembly is changed to a second operation type to clean the corner when the corner is determined, whether the corner is cleaned is determined, and the second operation type of the side brush assembly is returned to the first operation type when the corner is cleaned.
    Type: Application
    Filed: April 11, 2013
    Publication date: April 24, 2014
    Inventors: Jaewon Jang, Joonsik Choi
  • Publication number: 20130075665
    Abstract: A water-soluble nanoparticle complex has a plurality of accumulated nanoparticles and has excellent uniformity and stability by forming a complex of nanoparticles using a water-soluble polymer and which allows for use of nanoparticles in biochemical applications.
    Type: Application
    Filed: June 24, 2011
    Publication date: March 28, 2013
    Applicant: TORAY INDUSTRIES, INC.
    Inventors: Joonsik Park, Masashi Higasa, Asako Sogame
  • Patent number: 8174128
    Abstract: A method of manufacturing a semiconductor package that includes: forming a first board; forming second boards, in each of which at least one cavity is formed; attaching the second boards to both sides of the first board, such that the second boards are electrically connected with the first board; and connecting at least one component with the first board by a flip chip method by embedding the component in the cavity. The method can prevent damage to the semiconductor chips and lower manufacturing costs, while the connection material may also mitigate stresses, to prevent cracking in the boards and semiconductor chips, while preventing defects such as bending and warpage. Defects caused by temperature changes may also be avoided. Furthermore, it is not necessary to use an underfill in the portions where the semiconductor chips are connected with the printed circuit board, which allows for easier reworking and lower costs.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: May 8, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Nobuyuki Ikeguchi, Keungjin Sohn, JoonSik Shin, Jung-Hwan Park
  • Patent number: 8030752
    Abstract: A method of manufacturing a semiconductor package may include: forming a first board; forming second boards, in each of which at least one cavity is formed; attaching the second boards to both sides of the first board, such that the second boards are electrically connected with the first board; and connecting at least one component with the first board by a flip chip method by embedding the component in the cavity. The method can prevent damage to the semiconductor chips and lower manufacturing costs, while the connection material may also mitigate stresses, to prevent cracking in the boards and semiconductor chips, while preventing defects such as bending and warpage. Defects caused by temperature changes may also be avoided. Furthermore, it is not necessary to use an underfill in the portions where the semiconductor chips are connected with the printed circuit board, which allows for easier reworking and lower costs.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: October 4, 2011
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Nobuyuki Ikeguchi, Keungjin Sohn, JoonSik Shin, Jung-Hwan Park
  • Publication number: 20100291737
    Abstract: A method of manufacturing a semiconductor package that includes: forming a first board; forming second boards, in each of which at least one cavity is formed; attaching the second boards to both sides of the first board, such that the second boards are electrically connected with the first board; and connecting at least one component with the first board by a flip chip method by embedding the component in the cavity. The method can prevent damage to the semiconductor chips and lower manufacturing costs, while the connection material may also mitigate stresses, to prevent cracking in the boards and semiconductor chips, while preventing defects such as bending and warpage. Defects caused by temperature changes may also be avoided. Furthermore, it is not necessary to use an underfill in the portions where the semiconductor chips are connected with the printed circuit board, which allows for easier reworking and lower costs.
    Type: Application
    Filed: July 22, 2010
    Publication date: November 18, 2010
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Nobuyuki Ikeguchi, Keungjin Sohn, JoonSik Shin, Jung-Hwan Park
  • Publication number: 20090152742
    Abstract: A method of manufacturing a semiconductor package may include: forming a first board; forming second boards, in each of which at least one cavity is formed; attaching the second boards to both sides of the first board, such that the second boards are electrically connected with the first board; and connecting at least one component with the first board by a flip chip method by embedding the component in the cavity. The method can prevent damage to the semiconductor chips and lower manufacturing costs, while the connection material may also mitigate stresses, to prevent cracking in the boards and semiconductor chips, while preventing defects such as bending and warpage. Defects caused by temperature changes may also be avoided. Furthermore, it is not necessary to use an underfill in the portions where the semiconductor chips are connected with the printed circuit board, which allows for easier reworking and lower costs.
    Type: Application
    Filed: June 24, 2008
    Publication date: June 18, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Nobuyuki Ikeguchi, Keungjin Sohn, JoonSik Shin, Jung-Hwan Park