Abstract: A circuit for providing protection for power factor correction (PFC) boost converters from conditions such as input voltage surges that can otherwise cause failure. The circuit also prevents unnecessary down time of the boost converter after a power failure or on startup. The circuit detects the real time rectified input voltage and provides a real time comparison of the detected input voltage and the output voltage. The boost function is controlled as a function of the comparison. The circuit enables the boost converter to start and restart more quickly, even before the output voltage becomes stabilized, since boost is permitted as soon as the output voltage exceeds the real time sampled input voltage. By enabling boost during this period, the circuit eliminates the need to wait at least a few cycle times until the output voltage is higher than the peak of rectified input voltage.