Patents by Inventor Jose E Garza

Jose E Garza has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10972537
    Abstract: The subject matter described herein relates to protecting in-flight transaction requests, where a client device is connected via at least two application servers to a backend server device that is capable of processing redundant transaction requests originated by the client device. A first instance of a transaction request identified by a transaction identifier is received at the backend server device. The first instance of the transaction request is processed and a transaction response is sent to the client device. The transaction response identified by the transaction identifier is saved in a cache. If a subsequent instance of the transaction request is received, the cached transaction response is sent to the client device.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: April 6, 2021
    Assignee: International Business Machines Corporation
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Publication number: 20200068012
    Abstract: The subject matter described herein relates to protecting in-flight transaction requests, where a client device is connected via at least two application servers to a backend server device that is capable of processing redundant transaction requests originated by the client device. A first instance of a transaction request identified by a transaction identifier is received at the backend server device. The first instance of the transaction request is processed and a transaction response is sent to the client device. The transaction response identified by the transaction identifier is saved in a cache. If a subsequent instance of the transaction request is received, the cached transaction response is sent to the client device.
    Type: Application
    Filed: October 31, 2019
    Publication date: February 27, 2020
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Patent number: 10567504
    Abstract: The subject matter described herein relates to protecting in-flight transaction requests, where a client device is connected via at least two application servers to a backend server device that is capable of processing redundant transaction requests originated by the client device. A first instance of a transaction request identified by a transaction identifier is received at the backend server device. The first instance of the transaction request is processed and a transaction response is sent to the client device. The transaction response identified by the transaction identifier is saved in a cache. If a subsequent instance of the transaction request is received, the cached transaction response is sent to the client device.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: February 18, 2020
    Assignee: International Business Machines Corporation
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Publication number: 20190166194
    Abstract: The subject matter described herein relates to protecting in-flight transaction requests, where a client device is connected via at least two application servers to a backend server device that is capable of processing redundant transaction requests originated by the client device. A first instance of a transaction request identified by a transaction identifier is received at the backend server device. The first instance of the transaction request is processed and a transaction response is sent to the client device. The transaction response identified by the transaction identifier is saved in a cache. If a subsequent instance of the transaction request is received, the cached transaction response is sent to the client device.
    Type: Application
    Filed: November 29, 2017
    Publication date: May 30, 2019
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Patent number: 9442804
    Abstract: A mechanism is provided for message reconciliation during disaster recovery in an asynchronous replication system. A message is intercepted at a gateway remote from a primary data center to which the message is being sent. A copy of the message request is stored in a request message history remotely from the primary data center. The message is forwarded to the primary data center. A transaction history of the message request is stored at the primary data center which is mirrored to a disaster recovery site with other data from the primary data center. In response to determining that the primary data center has failed, messages in the request message history are compared with messages in the transaction history as retrieved from the disaster recovery site.
    Type: Grant
    Filed: October 25, 2012
    Date of Patent: September 13, 2016
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Patent number: 9350797
    Abstract: Disclosed are methods, systems, and computer programs for facilitating communication between a client application and a server application. A client application initiates an asynchronous communication with the server application by sending a request via a communication manager. The communication manager sends the request synchronously to the server application. Responsive to the communication manager not having received a final response from the server application, the communication manager responds to the client application that the sending the request was unsuccessful. Responsive to the communication manager having received a final response from the server application, the communication manager retains the response from the server application and responds to the client application that the sending a request was successful. The client application requests a final response from the communication manager and the communication manager provides the previously retained response.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: May 24, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Patent number: 9274797
    Abstract: A system and method for testing whether a computer processor is capable of executing a requested instruction set. The system includes a computer processor configured to receive an encoded conditional branch instruction in a form of machine code executable directly by the computer processor, and implement the encoded conditional branch instruction unconditionally, based on underlying hardware architecture of the computer processor. The Method for testing whether a computer processor is capable of executing a requested instruction set, the method including, receiving an encoded conditional branch instruction in a form of machine code executable directly by the computer processor, and implementing the encoded conditional branch instruction unconditionally, based on underlying hardware architecture of the computer processor.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: March 1, 2016
    Assignee: International Business Machines Corporation
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Patent number: 9262167
    Abstract: A system and method for testing whether a computer processor is capable of executing a requested instruction set. The system includes a computer processor configured to receive an encoded conditional branch instruction in a form of machine code executable directly by the computer processor, and implement the encoded conditional branch instruction unconditionally, based on underlying hardware architecture of the computer processor. The Method for testing whether a computer processor is capable of executing a requested instruction set, the method including, receiving an encoded conditional branch instruction in a form of machine code executable directly by the computer processor, and implementing the encoded conditional branch instruction unconditionally, based on underlying hardware architecture of the computer processor.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: February 16, 2016
    Assignee: International Business Machines Corporation
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Patent number: 9262168
    Abstract: A system and method for testing whether a computer processor is capable of executing a requested instruction set. The system includes a computer processor configured to receive an encoded conditional branch instruction in a form of machine code executable directly by the computer processor, and implement the encoded conditional branch instruction unconditionally, based on underlying hardware architecture of the computer processor. The Method for testing whether a computer processor is capable of executing a requested instruction set, the method including, receiving an encoded conditional branch instruction in a form of machine code executable directly by the computer processor, and implementing the encoded conditional branch instruction unconditionally, based on underlying hardware architecture of the computer processor.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: February 16, 2016
    Assignee: International Business Machines Corporation
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Patent number: 9069632
    Abstract: A method, system and computer program product for operating a transaction manager. An invocation to begin a transaction as well as a message sequence number for the transaction are received. It is then determined if the message sequence number is greater than the last processed message sequence number. If the message sequence number is greater than the last processed message sequence number, then the transaction is started. Otherwise, if the message sequence number is not greater than the last processed message sequence number, then the transaction is failed.
    Type: Grant
    Filed: August 15, 2011
    Date of Patent: June 30, 2015
    Assignee: International Business Machines Corporation
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Publication number: 20140372800
    Abstract: A mechanism is provided for message reconciliation during disaster recovery in an asynchronous replication system. A message is intercepted at a gateway remote from a primary data centre to which the message is being sent. A copy of the message request is stored in a request message history remotely from the primary data centre. The message is forwarded to the primary data centre. A transaction history of the message request is stored at the primary data centre which is mirrored to a disaster recovery site with other data from the primary data centre. In response to determining that the primary data centre has failed, messages in the request message history are compared with messages in the transaction history as retrieved from the disaster recovery site.
    Type: Application
    Filed: October 25, 2012
    Publication date: December 18, 2014
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Patent number: 8799906
    Abstract: A batched unit of work is associated with a plurality of messages for use with a data store. A backout count, associated with a number of instances that work in association with the batched unit of work, is backed out. A backout threshold is associated with the backout count. A commit count is associated with committing the batched unit of work in response to successful commits for a predefined number of the plurality of messages. A checker checks whether the backout count is greater than zero and less than the backout threshold. An override component, responsive to the backout count being greater than zero and less than the backout threshold, overrides the commit count and commits the batched unit of work for a subset of the plurality of messages.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: August 5, 2014
    Assignee: International Business Business Machines Corporation
    Inventors: Jose E. Garza, Matthew E. Golby-Kirk, Stephen J. Hobson, Trevor Dolby
  • Patent number: 8769536
    Abstract: A batched unit of work is associated with a plurality of messages for use with a data store. A backout count, associated with a number of instances that work in association with the batched unit of work, is backed out. A backout threshold is associated with the backout count. A commit count is associated with committing the batched unit of work in response to successful commits for a predefined number of the plurality of messages. A checker checks whether the backout count is greater than zero and less than the backout threshold. An override component, responsive to the backout count being greater than zero and less than the backout threshold, overrides the commit count and commits the batched unit of work for a subset of the plurality of messages.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: July 1, 2014
    Assignee: International Business Machines Corporation
    Inventors: Trevor Dolby, Jose E. Garza, Matthew E. Golby-Kirk, Stephen J. Hobson
  • Publication number: 20140173261
    Abstract: A system and method for testing whether a computer processor is capable of executing a requested instruction set. The system includes a computer processor configured to receive an encoded conditional branch instruction in a form of machine code executable directly by the computer processor, and implement the encoded conditional branch instruction unconditionally, based on underlying hardware architecture of the computer processor. The Method for testing whether a computer processor is capable of executing a requested instruction set, the method including, receiving an encoded conditional branch instruction in a form of machine code executable directly by the computer processor, and implementing the encoded conditional branch instruction unconditionally, based on underlying hardware architecture of the computer processor.
    Type: Application
    Filed: December 9, 2013
    Publication date: June 19, 2014
    Applicant: International Business Machines Corporation
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Publication number: 20140173260
    Abstract: A system and method for testing whether a computer processor is capable of executing a requested instruction set. The system includes a computer processor configured to receive an encoded conditional branch instruction in a form of machine code executable directly by the computer processor, and implement the encoded conditional branch instruction unconditionally, based on underlying hardware architecture of the computer processor. The Method for testing whether a computer processor is capable of executing a requested instruction set, the method including, receiving an encoded conditional branch instruction in a form of machine code executable directly by the computer processor, and implementing the encoded conditional branch instruction unconditionally, based on underlying hardware architecture of the computer processor.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 19, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Publication number: 20140173259
    Abstract: A system and method for testing whether a computer processor is capable of executing a requested instruction set. The system includes a computer processor configured to receive an encoded conditional branch instruction in a form of machine code executable directly by the computer processor, and implement the encoded conditional branch instruction unconditionally, based on underlying hardware architecture of the computer processor. The Method for testing whether a computer processor is capable of executing a requested instruction set, the method including, receiving an encoded conditional branch instruction in a form of machine code executable directly by the computer processor, and implementing the encoded conditional branch instruction unconditionally, based on underlying hardware architecture of the computer processor.
    Type: Application
    Filed: December 9, 2013
    Publication date: June 19, 2014
    Applicant: International Business Machines Corporation
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Publication number: 20140108492
    Abstract: Disclosed are methods, systems, and computer programs for facilitating communication between a client application and a server application. A client application initiates an asynchronous communication with the server application by sending a request via a communication manager. The communication manager sends the request synchronously to the server application. Responsive to the communication manager not having received a final response from the server application, the communication manager responds to the client application that the sending the request was unsuccessful. Responsive to the communication manager having received a final response from the server application, the communication manager retains the response from the server application and responds to the client application that the sending a request was successful. The client application requests a final response from the communication manager and the communication manager provides the previously retained response.
    Type: Application
    Filed: October 14, 2013
    Publication date: April 17, 2014
    Applicant: International Business Machines Corporation
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Publication number: 20120174109
    Abstract: A batched unit of work is associated with a plurality of messages for use with a data store. A backout count, associated with a number of instances that work in association with the batched unit of work, is backed out. A backout threshold is associated with the backout count. A commit count is associated with committing the batched unit of work in response to successful commits for a predefined number of the plurality of messages. A checker checks whether the backout count is greater than zero and less than the backout threshold. An override component, responsive to the backout count being greater than zero and less than the backout threshold, overrides the commit count and commits the batched unit of work for a subset of the plurality of messages.
    Type: Application
    Filed: March 9, 2012
    Publication date: July 5, 2012
    Applicant: International Business Machines Corporation
    Inventors: Trevor C. DOLBY, Jose E. GARZA, Matthew E. GOLBY-KIRK, Stephen J. HOBSON
  • Publication number: 20120054775
    Abstract: A method, system and computer program product for operating a transaction manager. An invocation to begin a transaction as well as a message sequence number for the transaction are received. It is then determined if the message sequence number is greater than the last processed message sequence number. If the message sequence number is greater than the last processed message sequence number, then the transaction is started. Otherwise, if the message sequence number is not greater than the last processed message sequence number, then the transaction is failed.
    Type: Application
    Filed: August 15, 2011
    Publication date: March 1, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jose E. Garza, Stephen J. Hobson
  • Patent number: 8112760
    Abstract: The present invention relates to an apparatus and computer program for workload balancing in an asynchronous messaging system. The number of server instances, which process work items from a queue of messages, is controlled based upon that queue's average queue depth and one or more predetermined thresholds.
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: February 7, 2012
    Assignee: International Business Machines Corporation
    Inventors: Jose E. Garza, Stephen J. Hobson