Patents by Inventor Jose Franco A. Alicante

Jose Franco A. Alicante has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230245928
    Abstract: In examples, a method for manufacturing a semiconductor package comprises forming a column of stealth damage locations along a thickness of a semiconductor wafer using a laser, each of the stealth damage locations having a semiconductor wafer crack associated therewith. The method also includes applying a first temperature to the semiconductor wafer to cause the semiconductor wafer to expand. The method includes applying a second temperature less than the first temperature to the semiconductor wafer to cause the semiconductor wafer to contract and to join two of the semiconductor wafer cracks with another semiconductor wafer crack. A difference between the first and second temperatures is at least 100 degrees Celsius.
    Type: Application
    Filed: February 1, 2022
    Publication date: August 3, 2023
    Inventors: Jeniffer ASPURIA, Jose Franco ALICANTE, Jesus BAUTISTA, Jr.
  • Patent number: 6650011
    Abstract: A work station for a chip bonder, and/or for a wire bonder includes a clampless, porous ceramic vacuum chuck where the substrate under assembly is securely and uniformly held by vacuum applied through many tiny pores distributed across the work surface. Porous ceramic work stations are applicable to a family of packages, or to a substrate outline, and may include one or more chips within the same indexing operation. Reliability and yield of the assembled semiconductor devices is enhanced by avoiding uneven or warped substrates. In addition, the porous ceramic work holder provides a cost effective apparatus by eliminating device specific clamps and work holders, the time required for change-out and set-up.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: November 18, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Raymond M. Partosa, Allan C. Soriano, Enrique R. Ferrer, Jr., Ramil A. Viluan, Melvin B. Alviar, Jose Franco A. Alicante
  • Publication number: 20030140470
    Abstract: A work station for a chip bonder, and/or for a wire bonder includes a clampless, porous ceramic vacuum chuck where the substrate under assembly is securely and uniformly held by vacuum applied through many tiny pores distributed across the work surface. Porous ceramic work stations are applicable to a family of packages, or to a substrate outline, and may include one or more chips within the same indexing operation. Reliability and yield of the assembled semiconductor devices is enhanced by avoiding uneven or warped substrates. In addition, the porous ceramic work holder provides a cost effective apparatus by eliminating device specific clamps and work holders, the time required for change-out and set-up.
    Type: Application
    Filed: January 25, 2002
    Publication date: July 31, 2003
    Inventors: Raymond M. Partosa, Allan C. Soriano, Enrique R. Ferrer, Ramil A. Viluan, Melvin B. Alviar, Jose Franco A. Alicante