Patents by Inventor Jose L. Cruz

Jose L. Cruz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230422639
    Abstract: A semiconductor structure, system and method. The semiconductor structure comprises: a substrate including circuitry therein; and a semiconductor stack on the substrate, the semiconductor stack including: a first electrically conductive layer including a metal and electrically coupled to the circuitry of the substrate; and a second electrically conductive layer between the substrate and the first electrically conductive layer, the second electrically conductive layer including one of a refractory metal, or a combination including silicon, carbon and nitride. The second electrically conductive layer may serve as a barrier layer between the first electrically conductive layer and the material of the underlying substrate, in this manner avoiding the formation of an intermixing region between the metal of the first electrically conductive layer and the material of the substrate during deposition of the metal.
    Type: Application
    Filed: June 27, 2022
    Publication date: December 28, 2023
    Applicant: Intel Corporation
    Inventors: Shafaat Ahmed, Gowtham Sriram Jawaharram, Cyrus M. Fox, Jose L. Cruz-Campa, Kriti Agarwal, Jian Jiao, Hong Li, Bharat V. Krishnan, Ervin T. Hill, III
  • Publication number: 20230354723
    Abstract: In one embodiment, a crosspoint memory device is manufactured by forming a material stack and patterning the material stack to form a plurality of memory cells of the cross point memory device. Forming the material stack includes depositing a select device (SD) region material comprising chalcogenide, depositing a layer comprising carbon on the SD region material at a temperature below 40° C., depositing an ohmic contact layer on the layer comprising carbon, and depositing a phase change material (PM) region material comprising chalcogenide on the ohmic contact layer.
    Type: Application
    Filed: May 2, 2022
    Publication date: November 2, 2023
    Applicant: Intel Corporation
    Inventors: Gowtham Sriram Jawaharram, Cyrus M. Fox, Jose L. Cruz-Campa, Shafaat Ahmed, Qiaoer Zhou, Duo Li, Hong Li
  • Patent number: 8681491
    Abstract: A mobile phone case system having a case divided into a first half case having a top portion and side edges and a second half case having a bottom portion and side edges, together the first half and second half case form an inner cavity adapted to hold a mobile phone, with a first stand component pivotally attached to an outer surface of the bottom portion of the second half case via a hinge component, the hinge component allows the first stand component to pivot between an extended position wherein bottom edges of the first stand component are pivoted away from the outer surface of the bottom portion of the second half case and a retracted position wherein the first stand component is flush with the outer surface of the bottom portion of the second half case.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: March 25, 2014
    Inventors: Jose L. Cruz, Maria E. Benito
  • Patent number: 7525955
    Abstract: A software platform in an Internet Protocol (IP) phone having the ability to be used with different communication infrastructures such as broadband, wireless communication and Plain Old Telephone System (POTS) service. Further, the software platform in the IP phone has the ability to be used with different applications operating on the IP phone. Further, the IP phone has the ability to perform additional functionality than traditional Public Switched Telephone Network (PSTN) phones, such as searches and advertising, given its ability to converge voice and data within a single terminal.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: April 28, 2009
    Assignee: Commuca, Inc.
    Inventors: Carlos J. Velez-Rivera, Inaki Olivares-Arocho, Jose L. Cruz-Rivera
  • Patent number: 6599173
    Abstract: A CMP slurry for and method of polishing a semiconductor wafer during formation of metal interconnects are disclosed. The present invention utilizes a first slurry comprising a first oxidizer, preferably ferric nitrate, to remove the excess metal of the metal interconnect but which leaves the metal residues on the surface of the wafer. A second slurry comprising another oxidizer, preferably potassium iodate solution, having a greater affinity to both the metal residue and the liner material than the underlying dielectric is used to remove the metal residue and liner material with significantly reduced scratching of the underlying dielectric. The more robust metal interconnects formed utilizing the present invention is effective in lowering the overall resistance of a wafer, reducing the number of shorts, and provides greater protection of the underlying dielectric. Overpolishing of the wafer and its associated problems are avoided.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: July 29, 2003
    Assignee: International Business Machines Corporation
    Inventors: Jose L. Cruz, Cuc K. Huynh, Timothy C. Krywanczyk, Douglas K. Sturtevant
  • Patent number: 6468135
    Abstract: The present invention is a method and apparatus for CMP processing that reduces scratching of the insulating film and conductor lines of a wafer. More specifically, the method and apparatus introduce an aqueous solution to the polishing pad and wafer during various intervals of the polishing procedure.
    Type: Grant
    Filed: April 30, 1999
    Date of Patent: October 22, 2002
    Assignee: International Business Machines Corporation
    Inventors: Jose L. Cruz, Cuc K. Huynh, David L. Walker
  • Patent number: 6455434
    Abstract: The present invention provides a method of preventing the build-up of polishing material within low areas of a substrate during polishing. Following the blanket deposition of a first layer, a selectively removable material is deposited over the first layer, wherein the selectively removable material fills the low areas. A surface of the substrate is polished removing the excess first layer and selectively removable material from the surface, leaving the first layer and selectively removable material within the low area. Following polishing, the selectively removable material is removed from the low areas prior to the deposition of a second layer.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: September 24, 2002
    Assignee: International Business Machines Corporation
    Inventors: Chad R. Binkerd, Jose L. Cruz, Timothy C. Krywanczyk, Brian D. Pfeifer, Rosemary A. Previti-Kelly, Patricia Schink, Amye L. Wells
  • Patent number: 5531443
    Abstract: A keypad controller for use with a video game comprising a housing; a cable connector mechanism extended from the housing and coupleable to a plug end of a cable for connection and communication with a video game; and a plurality of actuateable directional switches each coupled to the cable connector mechanism and extended from the housing with each directional switch associated with a compass direction and with each directional switch generating a unique signal when actuated for controlling the direction of events of a video game.
    Type: Grant
    Filed: September 13, 1994
    Date of Patent: July 2, 1996
    Inventor: Jose L. Cruz