Patents by Inventor Josef Hirtreiter

Josef Hirtreiter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8912087
    Abstract: A method for manufacturing a chip package is provided. The method includes: forming an electrically insulating material over a chip side; selectively removing at least part of the electrically insulating material thereby forming a trench in the electrically insulating material, depositing electrically conductive material in the trench wherein the electrically conductive material is electrically connected to at least one contact pad formed over the chip side; forming an electrically conductive structure over the electrically insulating material, wherein at least part of the electrically conductive structure is in direct physical and electrical connection with the electrically conductive material; and depositing a joining structure over the electrically conductive structure.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: December 16, 2014
    Assignee: Infineon Technologies AG
    Inventors: Josef Hirtreiter, Walter Hartner, Ulrich Wachter, Juergen Foerster
  • Patent number: 8872314
    Abstract: A method for producing a component and device including a component is disclosed. A basic substrate having paper as substrate material is provided, at least one integrated circuit is applied to the basic substrate, the at least one integrated circuit applied on the basic substrate is enveloped with an encapsulant, and at least parts of the basic substrate are removed from the at least one enveloped integrated circuit.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: October 28, 2014
    Assignee: Infineon Technologies AG
    Inventors: Horst Theuss, Albert Auburger, Jochen Dangelmaier, Josef Hirtreiter
  • Publication number: 20140035127
    Abstract: A method for manufacturing a chip package is provided. The method includes: forming an electrically insulating material over a chip side; selectively removing at least part of the electrically insulating material thereby forming a trench in the electrically insulating material, depositing electrically conductive material in the trench wherein the electrically conductive material is electrically connected to at least one contact pad formed over the chip side; forming an electrically conductive structure over the electrically insulating material, wherein at least part of the electrically conductive structure is in direct physical and electrical connection with the electrically conductive material; and depositing a joining structure over the electrically conductive structure.
    Type: Application
    Filed: August 1, 2012
    Publication date: February 6, 2014
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Josef Hirtreiter, Walter Hartner, Ulrich Wachter, Juergen Foerster
  • Publication number: 20130277864
    Abstract: A method for producing a component and device including a component is disclosed. A basic substrate having paper as substrate material is provided, at least one integrated circuit is applied to the basic substrate, the at least one integrated circuit applied on the basic substrate is enveloped with an encapsulant, and at least parts of the basic substrate are removed from the at least one enveloped integrated circuit.
    Type: Application
    Filed: June 18, 2013
    Publication date: October 24, 2013
    Inventors: Horst Theuss, Albert Auburger, Jochen Dangelmaier, Josef Hirtreiter
  • Patent number: 8482135
    Abstract: A method for producing a component and device including a component is disclosed. A basic substrate having paper as substrate material is provided, at least one integrated circuit is applied to the basic substrate, the at least one integrated circuit applied on the basic substrate is enveloped with an encapsulant, and at least parts of the basic substrate are removed from the at least one enveloped integrated circuit.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: July 9, 2013
    Assignee: Infineon Technologies AG
    Inventors: Horst Theuss, Albert Auburger, Jochen Dangelmaier, Josef Hirtreiter
  • Publication number: 20080036099
    Abstract: A method for producing a component and device including a component is disclosed. A basic substrate having paper as substrate material is provided, at least one integrated circuit is applied to the basic substrate, the at least one integrated circuit applied on the basic substrate is enveloped with an encapsulant, and at least parts of the basic substrate are removed from the at least one enveloped integrated circuit.
    Type: Application
    Filed: June 29, 2007
    Publication date: February 14, 2008
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Horst Theuss, Albert Auburger, Jochen Dangelmaier, Josef Hirtreiter
  • Patent number: 6514670
    Abstract: A method for designing and manufacturing a micromechanical device providing a substrate having an anchoring region forming a sacrificial layer on substrate while leaving bare the anchoring region depositing an adhesion layer (30) on the sacrificial layer (25) and the anchoring region (20; 120; 220; 320, 325; 420, 425; 620; 755); forming a mask on the adhesion layer; depositing an electroplating layer on the unmasked region of the adhesion layer; and removing the mask and the sacrificial layer.
    Type: Grant
    Filed: July 12, 2000
    Date of Patent: February 4, 2003
    Assignee: Robert Bosch GmbH
    Inventors: Josef Hirtreiter, Bernhard Elsner
  • Patent number: 6290858
    Abstract: A manufacturing method for a micromechanical device. In this method, a substrate is prepared with a plating base area to accommodate an anchoring region, and an adhesive layer is formed and structured on the substrate, so that the anchoring region is formed in the plating base area in the form of a quasi-insular region in a recess of the adhesive layer. The quasi-insular region is connected to the adhesive layer outside of the plated based area by at least one thin web. A mask is formed on the adhesive layer and structured so that the anchoring region and an overgrowth region adjacent to the anchoring region remain unmasked. An electroplated layer is deposited on the unmasked anchoring region so that the overgrowth region is overgrown, and the mask and the part of the adhesive layer that has not been overgrown are removed.
    Type: Grant
    Filed: October 13, 1999
    Date of Patent: September 18, 2001
    Assignee: Robert Bosch GmbH
    Inventors: Josef Hirtreiter, Bernhard Elsner