Abstract: A technique for powering gate drivers in a half-bridge configuration uses a single external power supply to power each gate driver. A single on-chip regulator regulates the positive turn-on voltage for each switch. The regulator overhead, is also used as the negative voltage for turn-off, thus transferring the low-frequency variation of the external power supply to the negative turn-off voltage. Accordingly, a single on-chip regulator generates both the positive turn-on voltage and the negative turn-off voltage. In at least one embodiment, reuse of the switch turn-off current further reduces on-chip power dissipation. The on-chip regulator's output filter capacitor discharges during turn-on of the external power switching device. During turn-off, the current that discharges the switch gate capacitance recharges the regulator filter capacitor.

Abstract: A technique for powering gate drivers in a half-bridge configuration uses a single external power supply to power each gate driver. A single on-chip regulator regulates the positive turn-on voltage for each switch. The regulator overhead, is also used as the negative voltage for turn-off, thus transferring the low-frequency variation of the external power supply to the negative turn-off voltage. Accordingly, a single on-chip regulator generates both the positive turn-on voltage and the negative turn-off voltage. In at least one embodiment, reuse of the switch turn-off current further reduces on-chip power dissipation. The on-chip regulator's output filter capacitor discharges during turn-on of the external power switching device. During turn-off, the current that discharges the switch gate capacitance recharges the regulator filter capacitor.

Abstract: A technique for powering gate drivers in a half-bridge configuration uses a single external power supply to power each gate driver. A single on-chip regulator regulates the positive turn-on voltage for each switch. The regulator overhead, is also used as the negative voltage for turn-off, thus transferring the low-frequency variation of the external power supply to the negative turn-off voltage. Accordingly, a single on-chip regulator generates both the positive turn-on voltage and the negative turn-off voltage. In at least one embodiment, reuse of the switch turn-off current further reduces on-chip power dissipation. The on-chip regulator's output filter capacitor discharges during turn-on of the external power switching device. During turn-off, the current that discharges the switch gate capacitance recharges the regulator filter capacitor.

Abstract: A pulse frequency modulated (PFM) voltage converter autonomously switches between buck, buck-boost, and boost modes as a function of the input and output voltages. The voltage converter may also switch autonomously between buck mode and a low drop out (LDO) mode when configured in a system in which the battery voltage is known to always be higher than the output voltage.

Abstract: A DC-DC converter with a programmable pulse time limit. A charge pulse begins when the output voltage reaches a minimum threshold and terminates in response to a discharge indication, in which charge current flows through an inductive element while the charge pulse is provided. The discharge indication is provided to initiate a discharge pulse when the charge current reaches a peak threshold, which terminates in response to a reset indication. Current is discharged from the inductive element during the discharge pulse. A zero crossing detector provides the reset indication when the discharge current reaches a minimum level. A programmable timing circuit limits a duration of either one or both of the charge pulse and the discharge pulse to prevent hangup or excessive output voltage ripple. The DC-DC converter may include a memory that stores a digital value used to program the programmed time duration of the programmable timing circuit.