Patents by Inventor Joseph A. CUGGINO

Joseph A. CUGGINO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942901
    Abstract: A circuit comprises an amplifier network including a first amplifier and a second amplifier and a first transistor having a first base. The first transistor is thermally isolated from the second amplifier. The circuit further comprises a second transistor having a second base. The second transistor is thermally linked to the second amplifier. The circuit further comprises coupling circuitry configured to couple the first base to the second base.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: March 26, 2024
    Assignee: Skyworks Solutions, Inc.
    Inventors: Joseph A Cuggino, Anthony Francis Quaglietta
  • Publication number: 20230117991
    Abstract: According to at least one example, an amplifier circuit includes an amplifier and a temperature sensor circuit. The temperature sensor circuit includes a first transistor thermally isolated from the amplifier and being configured to sense an ambient temperature, and a second transistor thermally linked to the amplifier and being configured to sense a temperature at the amplifier, the temperature sensor circuit being a differential circuit having a first path and a second path with the first and second transistors being arranged on the first and second paths of the differential circuit respectively. The temperature sensor circuit is configured to generate an output voltage inversely proportional to a temperature difference between the ambient temperature and the temperature at the amplifier.
    Type: Application
    Filed: October 12, 2022
    Publication date: April 20, 2023
    Inventors: Pietro Natale Alessandro Chyurlia, Gordon Glen Rabjohn, Joseph A. Cuggino, Anthony Francis Quaglietta
  • Publication number: 20230037298
    Abstract: A circuit comprises an amplifier network including a first amplifier and a second amplifier and a first transistor having a first base. The first transistor is thermally isolated from the second amplifier. The circuit further comprises a second transistor having a second base. The second transistor is thermally linked to the second amplifier. The circuit further comprises coupling circuitry configured to couple the first base to the second base.
    Type: Application
    Filed: July 8, 2022
    Publication date: February 9, 2023
    Inventors: Joseph A CUGGINO, Anthony Francis QUAGLIETTA
  • Patent number: 11418150
    Abstract: A circuit comprises an amplifier network including a first amplifier and a second amplifier and a first transistor having a first base. The first transistor is thermally isolated from the second amplifier. The circuit further comprises a second transistor having a second base. The second transistor is thermally linked to the second amplifier. The circuit further comprises coupling circuitry configured to couple the first base to the second base.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: August 16, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventors: Joseph A Cuggino, Anthony Francis Quaglietta
  • Publication number: 20210175856
    Abstract: A circuit comprises an amplifier network including a first amplifier and a second amplifier and a first transistor having a first base. The first transistor is thermally isolated from the second amplifier. The circuit further comprises a second transistor having a second base. The second transistor is thermally linked to the second amplifier. The circuit further comprises coupling circuitry configured to couple the first base to the second base.
    Type: Application
    Filed: December 4, 2020
    Publication date: June 10, 2021
    Inventors: Joseph A. CUGGINO, Anthony Francis QUAGLIETTA
  • Publication number: 20200127614
    Abstract: Peak voltage limiting circuits and method for power amplifiers. A power amplifier and/or a voltage limiting circuit includes a diode circuit coupled to an output of an amplification stage, the diode circuit configured to provide a conductive path from the output when an output voltage exceeds a selected value. The power amplifier and/or voltage limiting circuit also includes a sink circuit coupled to the diode circuit and a bias circuit, the sink circuit configured to reduce a bias voltage provided by the bias circuit when the output voltage exceeds the selected value to thereby limit the output voltage.
    Type: Application
    Filed: May 7, 2019
    Publication date: April 23, 2020
    Inventors: Anthony Francis QUAGLIETTA, Joseph A. CUGGINO, Xuanang ZHU
  • Patent number: 10284153
    Abstract: Peak voltage limiting circuits and method for power amplifiers. A power amplifier and/or a voltage limiting circuit includes a diode circuit coupled to an output of an amplification stage, the diode circuit configured to provide a conductive path from the output when an output voltage exceeds a selected value. The power amplifier and/or voltage limiting circuit also includes a sink circuit coupled to the diode circuit and a bias circuit, the sink circuit configured to reduce a bias voltage provided by the bias circuit when the output voltage exceeds the selected value to thereby limit the output voltage.
    Type: Grant
    Filed: September 30, 2015
    Date of Patent: May 7, 2019
    Assignee: Skyworks Solutions, Inc.
    Inventors: Anthony Francis Quaglietta, Joseph A Cuggino, Xuanang Zhu
  • Publication number: 20160099688
    Abstract: Peak voltage limiting circuits and method for power amplifiers. A power amplifier and/or a voltage limiting circuit includes a diode circuit coupled to an output of an amplification stage, the diode circuit configured to provide a conductive path from the output when an output voltage exceeds a selected value. The power amplifier and/or voltage limiting circuit also includes a sink circuit coupled to the diode circuit and a bias circuit, the sink circuit configured to reduce a bias voltage provided by the bias circuit when the output voltage exceeds the selected value to thereby limit the output voltage.
    Type: Application
    Filed: September 30, 2015
    Publication date: April 7, 2016
    Inventors: Anthony Francis QUAGLIETTA, Joseph A. CUGGINO, Xuanang ZHU
  • Patent number: 9124222
    Abstract: An internally, resistively, sensed Darlington amplifier includes a Darlington amplifier, at least an input transistor, an output transistor, a resistive divider, a signal input node, and a signal output node. The Darlington amplifier is responsive to an input signal and configured to generate an output signal. An internal bias setting resistor is coupled between the signal output node, a collector of the output transistor, and the resistive divider. The bias setting resistor is configured to set and regulate the bias current of the Darlington amplifier.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: September 1, 2015
    Assignee: HITTITE MICROWAVE CORPORATION
    Inventor: Joseph Cuggino
  • Publication number: 20140266466
    Abstract: An internally, resistively, sensed Darlington amplifier includes a Darlington amplifier, at least an input transistor, an output transistor, a resistive divider, a signal input node, and a signal output node. The Darlington amplifier is responsive to an input signal and configured to generate an output signal. An internal bias setting resistor is coupled between the signal output node, a collector of the output transistor, and the resistive divider. The bias setting resistor is configured to set and regulate the bias current of the Darlington amplifier.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: Hittite Microwave Corporation
    Inventor: Joseph Cuggino