Patents by Inventor Joseph Allen Glick

Joseph Allen Glick has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11409940
    Abstract: A method of validating support circuits of a qubit array includes generating virtual control waveforms from one or more abstracted support circuits of the qubit array. An abstracted pulse sequence is created from the virtual control waveforms. The abstracted pulse sequence is converted into waveforms. The waveforms are sent to individual qubits of the qubit array. Output data from the qubit array is captured in response to the sent waveforms.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: August 9, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Rajiv Joshi, Sudipto Chakraborty, Joseph Allen Glick, Pat Rosno
  • Publication number: 20220188500
    Abstract: A method of validating support circuits of a qubit array includes generating virtual control waveforms from one or more abstracted support circuits of the qubit array. An abstracted pulse sequence is created from the virtual control waveforms. The abstracted pulse sequence is converted into waveforms. The waveforms are sent to individual qubits of the qubit array. Output data from the qubit array is captured in response to the sent waveforms.
    Type: Application
    Filed: December 16, 2020
    Publication date: June 16, 2022
    Inventors: Rajiv Joshi, Sudipto Chakraborty, Joseph Allen Glick, Pat Rosno
  • Publication number: 20220115577
    Abstract: A superconducting circuit includes a first port and a plurality of second ports; a plurality of filter poles, each filter pole comprising an inductor and a capacitor connected in parallel, between the first port and a second port in the plurality of second ports; an admittance inverter comprising at least one of a coupling capacitor, a coupling inductor, and a Josephson junction, the admittance inverter linking two successive filter poles together. The plurality of filter poles and associated admittance inverters define a plurality of current branches so that, when operating as a demultiplexer, an input electrical current input though the first port is routed to a selected one of the plurality of the plurality of second ports by an application of a first set of magnetic flux biases.
    Type: Application
    Filed: October 9, 2020
    Publication date: April 14, 2022
    Inventors: Matthew Beck, Joseph Allen Glick